NAND Flash Memory String Modeling Across Threshold Voltages
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Solution Overview
Problem
Existing methods for simulating NAND flash memory circuits require multiple SPICE models for different threshold voltages, leading to increased complexity and reduced accuracy, which prolongs development time and increases costs.
Innovation Solution
A memory model building method that constructs linear and exponential models based on the relationship between test conditions, impedance values, and threshold voltages to simplify and enhance the simulation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple SPICE models are generated for different threshold voltages, then the simulation can cover different threshold voltage scenarios, but the complexity of maintaining numerous SPICE models increases
Solution Approach 1:
The patent creates a universal SPICE model template that can simulate multiple threshold voltage scenarios through parameter configuration rather than requiring separate models. The model uses voltage-controlled switches and parameterized threshold voltage sources to achieve multi-functionality, allowing a single model structure to handle different threshold voltage conditions by adjusting internal parameters and control signals.
Solution Approach 2:
The patent employs parameter changes by making the threshold voltage a configurable parameter within the SPICE model rather than a fixed value. The model uses parameterized components where threshold voltage can be adjusted through simulation control, allowing the same model structure to adapt to different threshold voltage scenarios by changing parameters rather than creating entirely new models.
2Adaptability or versatility
If multiple SPICE models are generated for different threshold voltages, then different threshold voltage scenarios can be simulated, but the development time increases
Solution Approach 1:
The patent creates a universal SPICE model template that can simulate multiple threshold voltage scenarios through parameter configuration rather than requiring separate models. The model uses voltage-controlled switches and parameterized threshold voltage sources to achieve multi-functionality, allowing a single model structure to handle different threshold voltage conditions by adjusting internal parameters and control signals.
Solution Approach 2:
The patent performs preliminary action by pre-configuring the SPICE model with parameterized components and control structures that anticipate different threshold voltage scenarios. The model is designed in advance with adjustable parameters and control mechanisms, so when simulation is needed, the model is already prepared to handle various threshold voltage conditions without requiring additional development work.
3Adaptability or versatility
If the current-voltage characteristic curve is shifted to generate SPICE models for different threshold voltages, then multiple threshold voltage models can be created, but the accuracy of the simulation decreases
Solution Approach 1:
The patent segments the memory string into multiple memory cell units, each with its own voltage-controlled switch and threshold voltage source. This segmentation allows each cell to be independently controlled and modeled with accurate threshold voltage characteristics, avoiding the accuracy loss that would result from simply shifting a single current-voltage curve. Each segment can be precisely configured to represent different threshold voltage conditions.
Solution Approach 2:
The patent introduces voltage-controlled switches as intermediary elements between the input signal and the memory cell. These switches are controlled by threshold voltage signals and provide precise control over when current flows through each memory cell. This intermediary mechanism allows accurate representation of threshold voltage effects without relying on approximate curve-shifting methods.
Data Source
AI summary
Disclosed is a memory model building method and a memory circuit simulation method. The memory model building method includes the following steps. A test condition is applied to unselected memory cells in a memory string. A threshold voltage of a selected memory cell in the memory string is programmed to a first threshold voltage value. Tests are performed on the memory cell string by setting the test condition as test values so as to obtain first impedance values corresponding to the test values. The test values and the corresponding first impedance values are analyzed so as to obtain a linear model having a first slope value and a first intercept value. A relationship between the test values and the corresponding first impedance values at the first threshold voltage value satisfies the linear model.


