NAND Flash Memory Soft Program Voltage Compensation
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Solution Overview
Problem
In NAND type flash memory, the dispersion of threshold voltages among memory cells due to capacitance coupling and inter-cell interference leads to writing and erase errors, especially at the ends of the NAND cell unit where select gate transistors are directly connected.
Innovation Solution
The implementation of a soft program operation and the use of dummy cells at the ends of the NAND cell unit, where different voltages are applied to word lines and dummy word lines based on the state of the dummy cells and memory cells, to maintain uniform threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND type flash memory is used with high integration, then storage capacity increases and unit cell area decreases, but threshold voltage dispersion increases due to capacitance coupling and inter-cell interference
Solution Approach 1:
The patent applies different voltages to different regions of the memory array. Specifically, memory cells at the ends of NAND cell units (which experience stronger inter-cell interference) receive different voltage compensation than cells in the middle. This local differentiation compensates for the non-uniform threshold voltage dispersion caused by high integration density.
Solution Approach 2:
The patent changes the voltage parameters applied to word lines and dummy word lines to compensate for threshold voltage dispersion. By adjusting voltage levels and application timing, the system counteracts the harmful effects of capacitance coupling and maintains uniform threshold voltage distribution across the high-density memory array.
2Device complexity
If select gate transistors are directly connected to memory cells at the ends of NAND cell units, then device complexity is reduced, but threshold voltage dispersion increases due to inter-cell interference
Solution Approach 1:
The patent introduces dummy cells at the ends of NAND cell units where select gate transistors are directly connected. These dummy cells experience the same inter-cell interference as the actual memory cells at the ends, allowing for localized voltage compensation. Different voltages are applied to dummy word lines connected to these end cells, correcting the threshold voltage dispersion without increasing overall structural complexity.
3Reliability
If different voltages are applied to word lines and dummy word lines to suppress threshold voltage dispersion, then threshold voltage uniformity improves, but device complexity increases
Solution Approach 1:
The patent segments the voltage control into two parts: word lines for normal memory cells and dummy word lines for end cells. This segmentation allows independent voltage control where needed (at the ends of NAND cell units) while maintaining simple unified control for the majority of cells in the middle, thus limiting the increase in overall control complexity.
Solution Approach 2:
The patent introduces dummy cells and dummy word lines as intermediary elements. These dummy structures serve as mediators that experience the same inter-cell interference as the actual end cells, allowing the system to measure and compensate for threshold voltage dispersion without directly modifying the main memory cell structure or control logic.
Data Source
AI summary
A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line.