Memory Controller Read Voltage Estimation for NAND Flash

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Solution Overview

Problem

Existing memory systems face challenges in accurately estimating optimal read voltages for NAND flash memory, leading to errors in data retrieval and increased wear on memory cells.

Innovation Solution

The memory system employs a memory controller that estimates read voltages by using different estimation methods based on the success or failure of error correction processes for different data pages, allowing for precise adjustment of read voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single estimation method is used for all data pages, then the estimation process is simple and fast, but the accuracy of read voltage estimation deteriorates due to inability to handle different error correction outcomes

Engineering Contradiction:
Improveread voltage estimation accuracyVSAvoidestimation process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the data pages into different groups based on error correction outcomes (successful error correction vs. failed error correction). Different estimation methods are applied to different segments: histogram-based estimation for successful corrections and alternative estimation for failures. This segmentation allows each segment to receive tailored estimation treatment, improving overall accuracy while managing complexity through structured classification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different estimation methodologies to different local groups of data pages based on their error correction characteristics. For pages with successful error correction, a first estimation method using histogram analysis is applied. For pages with failed error correction, a second estimation method is applied. This local differentiation optimizes estimation accuracy for each specific condition rather than using a uniform approach.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If multiple estimation methods are applied based on error correction success, then read voltage estimation accuracy improves, but the time required for voltage computation increases

Engineering Contradiction:
Improveread voltage estimation accuracyVSAvoidvoltage computation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs error correction and initial voltage estimation in a predetermined sequence before final voltage determination. The error correction process is executed first, then based on the outcome, the appropriate estimation method is applied. This preliminary structuring of operations allows the system to efficiently select and apply the right estimation method without unnecessary computational overhead, reducing overall time while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies estimation methods selectively rather than universally. Instead of applying all possible estimation methods to all data pages, it applies only the necessary estimation method based on the error correction outcome. This partial application approach reduces computational time by avoiding unnecessary estimation operations on pages that don't require them, while still achieving high accuracy where needed.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12300343B2Memory system
Publication Date: 2025.05.13 KIOXIA CORP
  • US12300343B2 patent drawing
  • US12300343B2 patent drawing
  • US12300343B2 patent drawing

AI summary

A memory system includes a nonvolatile memory including memory cells each configured to store first and second bits, and a memory controller. The memory controller is configured to: read first data by using a first voltage to a first read process that reads data corresponding to the first bit from the memory cells; read second data by using a second voltage to a second read process that reads data corresponding to the second bit from the memory cells; in a case where an error correction process of the first data is successful, determine a third voltage, based on the first data and third data that is obtained by error-correcting the first data; and update a first read voltage that is used to the first read process, from the first voltage to the third voltage.