NAND Flash Read Reference Voltage Optimization
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Solution Overview
Problem
Current NAND flash storage systems face challenges in accurately determining optimal read reference voltages, leading to incorrect logical value assignments and high raw bit error rates due to variations in threshold voltages, which are not effectively addressed by existing error-correction algorithms.
Innovation Solution
A memory system and method that determine a range of read reference voltages achieving minimal raw bit error rates (rBER), calculate an optimal read reference voltage within this range, and execute error correction processes using this voltage to improve error correction performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed read reference voltages are used for reading memory cells, then the reading operation can be performed, but threshold voltage variations cause threshold voltage shifts into different voltage windows resulting in incorrect logical values and high raw bit error rates
Solution Approach 1:
The patent implements dynamic adjustment of read reference voltages based on detected threshold voltage distributions. Instead of using fixed reference voltages, the system calculates optimal reference voltages that adapt to the actual threshold voltage shifts caused by program/erase cycles and retention time, thereby maintaining accurate logical value determination despite threshold voltage variations
Solution Approach 2:
The patent changes the parameters of read reference voltages by calculating optimal voltage values based on the detected threshold voltage distribution characteristics. The system adjusts the magnitude and positioning of read reference voltages to match the actual threshold voltage windows, transforming the static reference voltage parameters into optimized values that minimize raw bit error rates
2Quantity of substance
If multiple read reference voltages are used to divide threshold voltage ranges for multi-level cells, then more data can be stored per cell, but determining optimal read reference voltages becomes more complex and error-prone
Solution Approach 1:
The patent implements a self-service mechanism where the memory system automatically detects its own threshold voltage distributions and calculates optimal read reference voltages without external intervention. The controller performs self-diagnosis by reading memory cells, analyzing threshold voltage patterns, and autonomously determining the optimal reference voltage set for the current state of the memory device
Solution Approach 2:
The patent employs feedback mechanisms where the detected threshold voltage distributions are fed back into the calculation process for determining read reference voltages. The system continuously monitors threshold voltage shifts and adjusts reference voltages based on this feedback, creating a closed-loop control system that optimizes reading accuracy for multi-level cells
Data Source
AI summary
An apparatus of a memory system and an operating method thereof includes a plurality of memory devices; and a controller coupled with the plurality of memory devices, configured to determine a range of read reference voltages having a plurality of read reference voltages, the read reference voltages achieving a minimal rBER; calculate an optimal read reference voltage in accordance with at least the range of read reference voltages; achieve a rBER in accordance with at least the optimal read reference voltage; and execute error correction process with at least the optimal read reference voltage.