NAND Flash Memory Voltage Control for Data Accuracy
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Solution Overview
Problem
NAND flash memory devices face issues with erroneous data writing due to changes in memory cell threshold voltage distributions, particularly exacerbated by the miniaturization of memory cells, leading to insufficient data retention and accuracy.
Innovation Solution
The implementation of a NAND flash memory device with a read-write control section that adjusts voltage levels applied to word lines connected to control gate electrodes of memory cells adjacent to select gate transistors, setting the voltage lower or higher than predetermined levels to prevent changes in threshold voltage distributions, thereby reducing erroneous writing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage is applied to word lines and bit lines during writing or reading operations, then data can be written or read from memory cells, but the threshold value distribution of memory cells changes, causing erroneous writing
Solution Approach 1:
The patent applies different voltage levels to different word lines based on their position relative to the selected memory cell. Specifically, word lines of memory cells located closer to the common source line are supplied with a reference voltage (lower than write voltage), while other word lines are supplied with the write voltage. This local differentiation prevents unnecessary high voltage from causing threshold value changes in memory cells that don't need to be written, thereby maintaining data writing accuracy while enabling operational productivity.
2Quantity of substance
If miniaturization of memory cells is pursued, then storage density is improved, but erroneous writing of data becomes more severe due to increased sensitivity to voltage-induced threshold value changes
Solution Approach 1:
The patent implements local voltage control where only the necessary word lines receive high write voltage, while other word lines receive a lower reference voltage. This localized approach minimizes the total number of memory cells exposed to high voltage, thereby reducing cumulative threshold value changes and preventing erroneous writing, which is particularly important as memory cells become smaller and more sensitive to voltage-induced variations.
Solution Approach 2:
The patent takes preliminary action by pre-establishing a voltage control strategy that prevents threshold value changes before they can cause erroneous writing. By supplying reference voltage to word lines of memory cells closer to the common source line before the writing operation, the system proactively prevents the harmful effect of high voltage-induced threshold shifts, thereby maintaining data retention accuracy in miniaturized memory cells.
Data Source
AI summary
A NAND flash memory device includes: a memory cell array that includes a plurality of NAND memory cell units each including a connection element having a plurality of electrically-rewritable memory cells; a plurality of word lines that are connected to the plurality of memory cells; a plurality of bit lines that are connected to the plurality of memory cells; and a read-write control section that applies a voltage selectively to the plurality of word lines and the plurality of bit lines, wherein each of the plurality of NAND memory cell units includes a first select gate transistor and a second select gate transistor; and wherein the read-write control section sets an voltage level applied to word lines, so that the voltage level becomes lower than a predetermined voltage level applied to other word lines connected to control gate electrodes of memory cells.