NAND Flash Memory Read Disturb Mitigation via Weighted Page Counting

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Solution Overview

Problem

Flash memory devices, particularly those using NAND architecture, face significant read disturb issues due to increasing memory cell density, leading to reliability concerns that existing methods struggle to address efficiently and precisely.

Innovation Solution

A memory device and method that accumulate page read counts and incorporate latency and disturb factors to calculate block read counts, allowing for data arrangement that reduces read disturb errors by identifying and mitigating weak blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cell density is increased to improve storage capacity, then storage capacity is improved, but read disturb becomes more serious and reliability deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidread disturb
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies parameter changes by introducing a weighted read count calculation method that assigns different weights to different page types (e.g., sequential vs. random access patterns). This allows the system to differentiate between harmful and less harmful read operations, enabling more precise tracking of read disturb effects while maintaining high storage capacity. The weighted read count serves as a modified parameter that better reflects actual reliability risks.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If traditional read count accumulation is used to track read operations, then implementation is simple, but it cannot precisely identify weak blocks due to lack of differentiation between page types

Engineering Contradiction:
Improveimplementation simplicityVSAvoidweak block identification accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies segmentation by dividing the read count tracking into multiple categories based on page types (e.g., sequential pages, random pages, frequently accessed pages). Each page type maintains its own read count accumulator with specific weighting factors. This segmentation enables precise identification of weak blocks by capturing the differentiability between various read patterns, while the overall structure remains manageable through systematic categorization.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If all page reads are counted equally to simplify tracking, then tracking is simplified, but the read count does not reflect the actual impact of read disturb on different page types

Engineering Contradiction:
Improvetracking complexityVSAvoidread disturb impact assessment
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transforms the uniform read count parameter into a weighted read count parameter by introducing different weight factors for different page types. Pages that are more susceptible to read disturb (e.g., pages with adjacent programmed blocks) receive higher weights, while less susceptible pages receive lower weights. This parameter transformation maintains relatively simple tracking mechanics while significantly improving the accuracy of read disturb impact assessment.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11372587B2Memory device and method for managing read counts of memory device
Publication Date: 2022.06.28 MACRONIX INTERNATIONAL CO LTD
  • US11372587B2 patent drawing
  • US11372587B2 patent drawing
  • US11372587B2 patent drawing

AI summary

A memory device and a method for reducing read disturb errors of the memory device are provided. The memory device includes a plurality of memory cells arranged in series and organized into a plurality of blocks, a plurality of word lines respectively coupled to corresponding memory cells, and a controller coupled to the word lines for performing page read operations on the pages in respective blocks through corresponding word lines, in which each of the blocks comprises a plurality of pages of two or more types. The controller accumulates a page read count of the pages of each type in respective blocks, and arranges data to be stored according to the page read count and a latency factor corresponding to the pages of each type in each of the blocks.