NAND Flash Memory Write Controller Threshold Voltage Control
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Solution Overview
Problem
In NAND flash memory devices, the variation in threshold voltage of memory cell transistors due to process and circuit variations leads to unreliable and inefficient write operations, resulting in threshold voltage distribution widths that are not maintained within target limits, affecting reliability and performance.
Innovation Solution
A write controller is implemented that controls write operations by performing verification operations subsequent to program operations with increasing program voltage, using a first verification level followed by a second verification level, and optionally employing half-select write operations with intermediate voltages to ensure the threshold voltage of memory cell transistors is set within target limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the program voltage is stepped up to ensure the threshold voltage reaches the target value, then the threshold voltage distribution width is improved, but the write operation time and energy consumption increase
Solution Approach 1:
The write operation is divided into multiple phases: initial program operation at first voltage level, verification operation, and additional program operations at higher voltage levels only if needed. This segmented approach allows the system to achieve the target threshold voltage distribution without unnecessarily increasing write time for all cells.
Solution Approach 2:
The program voltage is dynamically adjusted based on the verification results. The write controller increases the program voltage stepwise only when the threshold voltage distribution width exceeds the target value, making the voltage adjustment adaptive rather than fixed, thus optimizing both precision and time.
2Manufacturing precision
If the program voltage is increased to compensate for process and circuit variations, then the threshold voltage distribution width is improved, but the energy consumption increases
Solution Approach 1:
The program voltage is dynamically adjusted based on verification results. The system only increases voltage when necessary to achieve the target distribution width, avoiding unnecessary energy consumption for cells that already meet the threshold requirements.
Solution Approach 2:
The program voltage parameter is changed stepwise based on the actual performance of each cell. By monitoring the threshold voltage distribution and adjusting the voltage parameter accordingly, the system achieves the desired precision while minimizing energy consumption compared to using a constantly high voltage.
3Manufacturing precision
If multiple program and verification operations are repeated to narrow the threshold voltage distribution, then the threshold voltage distribution width is improved, but the device complexity increases
Solution Approach 1:
The verification operation provides feedback on the threshold voltage distribution width to the write controller. Based on this feedback, the controller automatically determines whether additional program operations at higher voltage levels are needed, creating a closed-loop control system that manages complexity through intelligent decision-making.
Solution Approach 2:
The system performs an initial program operation and verification at a first voltage level before proceeding to higher voltage levels. This preliminary action establishes a baseline and determines whether further operations are necessary, avoiding unnecessary complexity for cells that achieve the target distribution width in the initial phase.
Data Source
AI summary
When data is written to a memory cell transistor, a write controller controls in such a manner that a verification operation subsequent to a program operation is carried out while a program voltage is increased stepwise for each program operation. The write controller controls in such a manner that a verification operation subsequent to a program operation by which a threshold voltage of a memory cell transistor to be written has become equal to or higher than a verification level for the first time is carried out twice or more at the same verification level, verification operations of the second and subsequent times are carried out after a second program operation which is carried out with the memory cell transistor set in an unselected state.