NAND Flash Recovery Control for Power-Interrupted Writes

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Solution Overview

Problem

Power interruptions during data writing in NAND flash memory systems can lead to data integrity issues and increased overhead due to the need for frequent rewriting of data to new blocks, reducing the memory's lifetime.

Innovation Solution

A memory system with a controller that checks for power interruptions at power-on and writes data to unaffected pages or management information in a nonvolatile memory, allowing for efficient management of data blocks and reducing the need for data copying during rewriting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is rewritten to a new block after power interruption, then data integrity is maintained, but the number of rewrite operations increases and memory lifetime is reduced

Engineering Contradiction:

Improvedata integrityVSAvoidmemory lifetime

Core Design Contradiction:

ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies preliminary action by erasing a predetermined number of pages (e.g., 3 pages) at the beginning of a write operation before actual data writing starts. This preliminary erasure creates a safety margin so that if power interruption occurs during the write process, the interrupted pages can be recovered without requiring a full block rewrite, thus preserving data integrity while reducing rewrite frequency and extending memory lifetime.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If data is rewritten to a new block after power interruption, then data integrity is maintained, but overhead and processing time increase

Engineering Contradiction:

Improvedata integrityVSAvoidoverhead time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

By performing preliminary erasure of a predetermined number of pages before data writing, the system prepares recovery-ready pages in advance. If power interruption occurs, only the interrupted pages need to be re-written rather than the entire block, significantly reducing the overhead time and processing burden during recovery operations.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If a predetermined number of pages are erased before writing, then recovery from power interruption is enabled, but initial write time increases

Engineering Contradiction:

Improverecovery capabilityVSAvoidwrite speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by erasing only a predetermined small number of pages (e.g., 3 pages) at the beginning of the write operation, rather than erasing the entire block. This partial preliminary erasure provides sufficient recovery capability for power interruption scenarios while minimizing the impact on initial write speed and overall productivity.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS8352672B2Memory system with nonvolatile memory

Publication Date: 2013.01.08 KIOXIA CORP

AI summary

A memory system includes a nonvolatile memory having a plurality of data blocks each of which is a unit of data erase and has a plurality of pages, each of the pages being a unit of data write, and a controller which checks whether or not the nonvolatile memory has been affected by power interruption at power-on time and, if the nonvolatile memory has been affected by power interruption, writes data to that first page in a first data block which has not been affected by power interruption.