NAND Memory Read Voltage Tuning from Flipped-Bit Valley Prediction
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Solution Overview
Problem
The accuracy of reading data from NAND type memory cells is affected by charge variations due to increased usage time and environmental factors, leading to read errors that conventional error correction methods struggle to address efficiently.
Innovation Solution
A memory device and system that determine a target valley bottom voltage by analyzing the number of flipped bits in two read results with closely spaced read voltages, allowing for precise read operations by using a predicted valley bottom voltage as the read voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fixed read voltage is used for reading data from NAND memory cells, then the read operation is simple and fast, but read errors increase due to charge variations from usage time and environmental factors
Solution Approach 1:
The patent applies preliminary action by performing a test read operation before the actual data read to acquire a test result indicating the number of flipped bits. Based on this preliminary information, the system determines the appropriate read voltage (target valley bottom voltage) in advance, ensuring accurate reading while avoiding the complexity of real-time voltage adjustment during data access.
Solution Approach 2:
The patent implements feedback by using the test result (number of flipped bits) to dynamically adjust the read voltage. The system acquires test results at different read voltages, determines the valley bottom voltage where flipped bits are minimized, and uses this feedback information to select the optimal read voltage for subsequent operations, thereby improving reading accuracy adaptively.
2Measurement precision
If read voltage is adjusted frequently to compensate for charge variations, then data reading accuracy improves, but read operation time increases
Solution Approach 1:
The patent applies partial action by performing read voltage adjustment only when necessary - specifically, by conducting a test read operation to determine if charge variations have occurred. Instead of continuously adjusting read voltage, the system performs partial adjustments based on test results, acquiring test results at multiple voltage points only when needed to determine the current valley bottom voltage, thus balancing precision with time efficiency.
3Reliability
If test read operations are performed to determine optimal read voltage, then read errors are reduced, but additional time and computational resources are consumed
Solution Approach 1:
The patent uses preliminary action by performing the test read operation and determining the optimal read voltage in advance before actual data access. The test result acquisition and valley bottom voltage determination are completed beforehand, so when actual data reading is needed, the system can directly use the pre-determined optimal voltage, minimizing the impact on data access speed while ensuring high reliability.
Solution Approach 2:
The patent implements dynamics by making the read voltage determination process adaptive rather than static. The system dynamically adjusts the read voltage based on test results that reflect current memory cell conditions (charge variations from usage and environment). This dynamic adjustment ensures high reliability under varying conditions while the system intelligently manages the trade-off with access speed.
Data Source
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AI summary
Examples of the present application disclose a memory device, a memory system, a memory controller, and an operation method. The memory device includes: a memory cell array comprising memory cells that store a plurality of memory bits, the plurality of memory bits corresponding to a plurality of orders of read voltages, and a preset number of the memory cells forming a code word; and a peripheral circuit coupled with the memory cell array and configured to: acquire a first result of at least one code word corresponding to a target read voltage of a target order; acquire a predicted valley bottom voltage of the target order according to the first result of the at least one code word corresponding to the target read voltage of the target order and a level in which the target order is located; and determine a target valley bottom voltage of the target order based on the predicted valley bottom voltage of the target order, wherein the target valley bottom voltage is taken as a read voltage for a read operation performed on the at least one code word.