3D NAND Memory Hard Mask Segmentation for Charge Storage Separation
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Solution Overview
Problem
The miniaturization of NAND flash memories is hindered by issues such as the difficulty in shrinking the hard mask thickness for self-aligned separation of charge storage layers, leading to increased aspect ratios and reduced controllability in forming memory cells, which complicates the process and limits storage density.
Innovation Solution
A three-dimensional nonvolatile semiconductor memory device is developed using a fin structure with a side mask wall layer formed on the hard mask, allowing for isotropic etching and selective removal of the side wall mask layer, reducing the initial thickness of the hard mask and enabling high-accuracy separation of charge storage layers without the need for conventional isotropic etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the hard mask thickness is reduced for self-aligned separation of charge storage layers, then the separation accuracy is improved, but the aspect ratio of trenches between adjacent fins increases making the process more difficult
Solution Approach 1:
The patent segments the mask structure into two distinct parts: a hard mask layer for defining the fin structure and a side wall mask layer formed on its sides. This segmentation allows the hard mask to be removed after fin formation while the side wall mask remains to guide the charge storage layer separation etching, thereby achieving high separation accuracy without requiring the hard mask to be excessively thin initially.
Solution Approach 2:
The side wall mask layer is formed preliminarily on the hard mask before the charge storage layer separation process. This preliminary action ensures that when the separation etching is performed, the side wall mask is already in position to provide precise alignment, eliminating the need for the hard mask to maintain its thickness throughout the entire process.
2Manufacturing precision
If the initial hard mask thickness is increased to maintain controllability during isotropic etching, then the separation process becomes more controllable, but the fin height increases and the aspect ratio of trenches increases
Solution Approach 1:
The patent extracts the masking function from the hard mask after fin formation by removing the hard mask while retaining the side wall mask. This extraction allows the side wall mask to independently perform the separation alignment function, enabling the use of thinner initial hard masks without compromising separation controllability, thereby reducing fin height and aspect ratio.
Solution Approach 2:
The side wall mask layer acts as an intermediary between the hard mask and the charge storage layer separation process. It transfers the alignment function from the hard mask to the separation etching process, allowing the hard mask to be thinner while maintaining separation controllability through the side wall mask's mediating role.
3Manufacturing precision
If a large process margin is preset for charge storage layer separation, then the separation accuracy is ensured, but the fin width between control gates becomes very narrow
Solution Approach 1:
The patent replaces the conventional approach of using a thick hard mask with large process margin with a side wall mask-based system. The side wall mask provides precise alignment through its geometric relationship with the fin structure, substituting the need for large process margins and enabling narrower fin widths while maintaining separation accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the miniaturization of memory devices by reducing the initial thickness of the hard mask and improving the accuracy of charge storage layer separation, facilitating the formation of memory cells with enhanced coupling ratios and increased storage density.
Implementation Method 1
the side wall mask layer is removed selectively to form the hard mask layer whose width is optimal for self-aligned separation of the charge storage layer
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory device includes a stacked layer structure including first to n-th semiconductor layers (n is a natural number equal to or larger than 2) stacked in a first direction which is perpendicular to a surface of a semiconductor substrate, and an upper insulating layer stacked on the n-th semiconductor layer, the stacked layer structure extending in a second direction which is parallel to the surface of the semiconductor substrate, and first to n-th NAND strings provided on surfaces of the first to n-th semiconductor layers in a third direction which is perpendicular to the first and second directions respectively.