Hierarchical Concatenated ECC for NAND RAU Speed and Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing storage systems face challenges in achieving both high reading speed and improved reliability through error correction coding, particularly due to limitations in the length of error correction codes (ECC) in Random Access Units (RAUs) of NAND chips.
Innovation Solution
The implementation of a hierarchical generalized concatenated code (H-GCC) system, which involves encoding information bits using an inner code to generate inner code words, and then encoding these inner code words using an outer code to produce an outer code word. This system utilizes a generalized concatenated code (GCC) with a hierarchical structure, incorporating both local and global parity bits to enhance coding efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If longer ECC codes are used to achieve better reliability, then the reliability is improved, but the RAU structure limits the code length to a particular length
Solution Approach 1:
The patent applies nested coding by combining an inner code (applied to each RAU independently) with an outer code (applied across multiple RAUs). The inner code provides local error correction within each RAU, while the outer code provides additional protection across the concatenated structure, effectively creating a nested code hierarchy that achieves longer effective code length without exceeding individual RAU limitations.
Solution Approach 2:
The patent segments the overall code into multiple inner codes, each applied to individual RAUs, and combines them with an outer code. This segmentation allows each inner code to operate within the RAU length constraint while the outer code provides additional redundancy across the segmented units, achieving the benefits of longer codes without violating the RAU structure.
2Reliability
If longer ECC codes are used to achieve better reliability, then the reliability is improved, but the decoding time increases
Solution Approach 1:
By segmenting the error correction into inner and outer codes, the patent enables parallel decoding of multiple inner codes simultaneously at the RAU level, while the outer code decoding operates on the concatenated structure. This segmented approach reduces overall decoding time compared to a single long code while maintaining the reliability benefits of the extended effective code length.
3Speed
If local ECC is applied to each RAU to maintain reading speed, then the reading speed is maintained, but the code length is limited to a particular length
Solution Approach 1:
The nested code structure allows inner codes to be applied to each RAU for fast local decoding (maintaining reading speed), while outer codes are applied across multiple RAUs to achieve longer effective code length. The hierarchical nesting enables both speed and extended code length to coexist by operating at different levels of the code structure.
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
Systems, devices, and methods for encoding information bits for storage, including obtaining information bits; encoding the information bits using an inner code to obtain a plurality of inner code words; encoding the plurality of inner code words using an outer code to generate an outer code word; and storing the outer code word in a storage device, wherein at least one of the inner code and the outer code includes a generalized concatenated code (GCC), and wherein the outer code word includes a hierarchical-GCC (H-GCC) code word.