NAND Initialization Block Layout for Lower Boot Peak Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing flash memory devices experience inefficiencies in power consumption and peak current during the initialization process due to increased word line loading and increased power consumption during initialization, which is not addressed by existing technologies.
Innovation Solution
A non-volatile memory device with a dummy pattern is programmed into unused memory cells in the initialization data block to reduce word line loading and peak current during initialization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the initialization data block is accessed during boot, then device initialization is performed, but word line loading and peak current increase
Solution Approach 1:
The patent extracts the harmful effect by introducing dummy patterns into unused memory cells of the initialization data block. These dummy patterns are specifically designed to be turned off by read voltage, thereby removing the unwanted word line loading and peak current effects while preserving the initialization function.
Solution Approach 2:
The dummy patterns act as intermediaries in the initialization data block. They occupy unused memory cells and interact with the read voltage to prevent direct coupling between the initialization data area and the word lines, thereby mediating the electrical load and reducing peak current.
2Reliability
If the initialization data block is accessed during boot, then device initialization is performed, but power consumption increases
Solution Approach 1:
The patent extracts the harmful energy consumption by introducing dummy patterns into unused memory cells. These dummy patterns are configured to be turned off by read voltage, thereby removing the unnecessary power consumption associated with reading initialization data from the entire block, including unused areas.
Solution Approach 2:
The dummy patterns serve as intermediaries that prevent direct electrical coupling between the initialization data area and the word lines during read operations. This mediation reduces the capacitive loading and consequently the power consumption during initialization.
3Power
If dummy pattern is programmed in unused memory cells, then word line loading is reduced, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by programming dummy patterns into unused memory cells during the manufacturing process. This preliminary programming simplifies subsequent read operations during initialization, as the dummy patterns are pre-configured to be turned off by read voltage, thereby reducing word line loading without adding operational complexity.
Solution Approach 2:
The patent changes the state parameter of unused memory cells by programming them with dummy patterns. This parameter change transforms these cells from inactive/unknown state to a controlled state that actively reduces word line loading when read voltage is applied, thereby achieving power reduction with minimal complexity increase.
Data Source
AI summary
A method of setting an initialization data block of a non-volatile memory device includes generating initialization data and a dummy pattern to be programmed into the initialization data block, programming the initialization data for initializing the nonvolatile memory device into memory cells of first NAND cell strings corresponding to an initialization data area of the initialization data block, and programming the dummy pattern in memory cells of second NAND cell strings corresponding to unused areas of the initialization data block, wherein the memory cell programmed with the dummy pattern is turned off by a read voltage provided to the initialization data block.