Managed NAND Memory Arbitration for Power Budget Compliance

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Solution Overview

Problem

Managed NAND memory devices in mobile systems face challenges in balancing power consumption with user experience, as keeping all memory die powered can quickly deplete battery life, and existing methods struggle to efficiently manage power usage while maintaining performance.

Innovation Solution

Implementing arbitration techniques that monitor active and inactive times of memory die, workload tasks, and splitting read/write operations into sub-operations to optimize power usage, allowing only read or write operations on channels at a time to align with power profiles and maintain a power budget.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If all memory die are kept powered to maintain high performance, then user experience and performance are improved, but power consumption increases and battery life decreases

Engineering Contradiction:
ImproveperformanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the power state of memory die based on workload characteristics. The controller monitors workload tasks and transitions memory die between active and inactive states according to real-time performance requirements and power budget constraints, making the system adaptable rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The arbitration circuit periodically evaluates workload characteristics and adjusts memory die power states accordingly. By monitoring active and inactive times and using time-stamps to track memory command execution, the system implements periodic assessments to determine optimal power states, creating a rhythm of activation and deactivation that balances performance and power consumption.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If memory die are deactivated to reduce power consumption, then power budget is maintained and battery life extends, but performance may deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The controller buffers memory commands and time-stamps them before execution. By preparing and queuing commands in advance, the system can quickly reactivate memory die when needed without significant performance penalty, as the commands are already ready to be executed once power is restored.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The arbitration circuit continuously monitors workload characteristics and performance requirements, using this feedback to make informed decisions about memory die activation. The system adjusts power states based on real-time conditions, ensuring performance is maintained when workload demands it while conserving power during lighter tasks.

Inventive Principle:
Principle #23Feedback

3Productivity

If read and write operations are performed simultaneously on multiple channels, then throughput is improved, but power consumption exceeds the power budget

Engineering Contradiction:
ImprovethroughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The arbitration circuit segments memory operations into distinct read and write phases across different channels. By dividing the memory system into independently controllable channels and time-slicing their operation, the system achieves parallel processing during active periods while maintaining power budget compliance through controlled deactivation of inactive channels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes operational parameters by alternating between read-intensive and write-intensive phases on different channels. This parameter switching allows the system to optimize for either throughput or power savings depending on the current operational phase, dynamically adjusting the balance between performance and power consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11237617B2Arbitration techniques for managed memory
Publication Date: 2022.02.01 MICRON TECHNOLOGY INC
  • US11237617B2 patent drawing
  • US11237617B2 patent drawing
  • US11237617B2 patent drawing

AI summary

Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include receiving an operation change indication for a NAND memory operation at power management circuitry of a NAND memory system, and summing a power credit to a value of a first register associated with the operation change indication to provide an indication of instantaneous power consumption of the NAND memory system as the value of the first register.