NAND Memory Controller Temperature Compensation
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Solution Overview
Problem
NAND flash memory devices experience increased raw bit error rates due to temperature dependence, leading to potential misplacements and uncorrectable errors, as the threshold voltage of cells changes with temperature variations, which existing error correcting codes cannot address effectively.
Innovation Solution
A memory controller that performs temperature checks before and after programming passes, adjusting programming parameters based on temperature differences and sending flags to the host controller for error correction or data recovery when temperature deviations exceed a threshold, ensuring accurate data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-level NAND memory programming is performed without temperature compensation, then programming speed is maintained, but bit error rate increases due to temperature dependence of threshold voltage
Solution Approach 1:
The patent performs a pre-read operation before the main programming pass to detect threshold voltage states at the initial temperature. This preliminary detection allows the system to establish a baseline for temperature-dependent voltage shifts, enabling subsequent compensation during the programming process without requiring complete re-programming.
Solution Approach 2:
The patent implements a feedback mechanism where the pre-read results are used to adjust programming parameters for the main pass. The system compares detected threshold voltage states with expected states, calculates temperature-induced deviations, and compensates by adjusting programming voltages accordingly, creating a closed-loop control system that reduces bit error rates.
2Reliability
If temperature checks and parameter adjustments are performed, then data integrity is improved, but programming time increases
Solution Approach 1:
The patent performs temperature compensation only for the most critical voltage thresholds that have the greatest impact on bit error rates. Rather than compensating for all possible threshold shifts, the system focuses on the predominant temperature-dependent variations, achieving significant reliability improvement with minimal additional time overhead.
Solution Approach 2:
The pre-read operation is performed quickly using simplified read circuits before the main programming pass. This preliminary temperature assessment is designed to be fast and low-overhead, providing sufficient temperature information for compensation without significantly extending the total programming time.
3Reliability
If existing error correcting codes are used without temperature awareness, then device complexity is kept low, but uncorrectable errors occur due to temperature-induced threshold voltage shifts
Solution Approach 1:
The patent introduces temperature as an intermediary parameter that mediates between the physical threshold voltage shifts and the logical error correction process. By measuring temperature and using it to adjust programming parameters, the system prevents temperature-induced errors before they occur, rather than attempting to correct them after the fact, thereby enhancing ECC effectiveness without requiring more complex error correction algorithms.
Data Source
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AI summary
Embodiments of the present disclosure may relate to a memory controller that may include a memory interface and a logic circuitry component coupled with the memory interface. In some embodiments, the logic circuitry component is to program one or more NAND cells of a multi-level NAND memory array via the memory interface with a first set of data in a first pass, determine a first temperature of the multi-level NAND memory array in association with the first pass, determine a second temperature of the multi-level NAND memory array, determine a temperature difference between the second temperature and the first temperature, and perform one or more operations based at least in part on a result of the determination of the temperature difference. Other embodiments may be described and/or claimed.