NAND Memory Cryptographic Components With On-Device Error Correction
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Solution Overview
Problem
Memory devices, such as NAND flash memory systems, face security vulnerabilities due to high bit error rates and the need for external cryptographic operations, which are insecure and time-consuming, especially when performing cryptographic operations on user data.
Innovation Solution
Integrating a cryptographic component within the memory device, along with an error correction component, to perform cryptographic operations locally, reducing the need for data transmission to an external controller and enhancing security and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic operations are performed externally on user data, then security is compromised due to data transmission requirements, but integrating cryptographic components internally increases device complexity
Solution Approach 1:
The patent combines the cryptographic component and error correction component within the memory device itself, merging previously separate functions (external controller cryptographic operations and internal error correction) into a unified integrated structure that eliminates secure data transmission requirements
2Loss of time
If cryptographic operations are performed externally, then data transmission time increases operational delays, but internal integration requires additional components
Solution Approach 1:
The patent merges cryptographic operations and error correction operations within the same memory device, eliminating the time-consuming external data transmission cycle and enabling parallel or sequential processing without transmission delays
Solution Approach 2:
The error correction component corrects read data before it is passed to the cryptographic component, performing preliminary error correction action to ensure clean input for cryptographic operations and preventing retransmission delays
3Measurement precision
If error correction is performed externally, then bit error rates affect cryptographic operation accuracy, but internal error correction increases processing complexity
Solution Approach 1:
The error correction component performs preliminary correction of read data before cryptographic processing, ensuring that cryptographic operations receive error-corrected input and maintaining measurement precision without requiring external intervention
Solution Approach 2:
The memory device performs self-correction of errors internally through the integrated error correction component, eliminating the need for external error correction processing and maintaining data accuracy autonomously
Data Source
AI summary
An apparatus, such as a memory system (e.g., a NAND memory system), can have a controller with a first error correction code component and a memory device (e.g., a NAND memory device) coupled to the controller. The memory device can have an array of memory cells, a second error correction code component coupled to the array and configured to correct data from the array, and a cryptographic component coupled to receive the corrected data from the second error correction code component.