NAND Memory Cryptographic Components With Local Error Correction
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Solution Overview
Problem
Memory devices, such as NAND flash memory systems, face security vulnerabilities due to high bit error rates and the need for external cryptographic and error correction processes, which are insecure and time-consuming.
Innovation Solution
Integrating a cryptographic component and an error correction component within the memory device to perform cryptographic operations and data correction locally, reducing reliance on external controllers and enhancing security and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic operations are performed externally (in controller), then device complexity is reduced, but security is compromised and time consumption increases
Solution Approach 1:
The patent combines the cryptographic component directly within the memory device, merging previously separate functions (memory storage and cryptographic processing) into a single integrated unit. This eliminates the need for external cryptographic processing, thereby improving security by keeping sensitive operations within the secure boundary of the memory device while accepting the trade-off of increased internal complexity.
2Loss of time
If data is transmitted to external controller for cryptographic processing, then device complexity is reduced, but time consumption and security risk increase
Solution Approach 1:
By integrating the cryptographic component within the memory device, the patent eliminates the time-consuming data transmission loop between memory device and external controller. The cryptographic operations are performed in-place on the stored data, significantly reducing processing time while accepting the complexity of incorporating cryptographic hardware within the memory device.
3Productivity
If error correction is performed externally, then device complexity is reduced, but productivity and security are compromised
Solution Approach 1:
The patent integrates the error correction component within the memory device, merging storage and error correction functions into a single unit. This allows error correction to be performed immediately on read data before cryptographic verification, improving productivity by eliminating external processing steps and enhancing security by keeping all operations within the secure memory device boundary.
4Productivity
If cryptographic operations are performed locally in memory device, then security and efficiency are improved, but device complexity increases
Solution Approach 1:
The patent merges cryptographic processing capabilities directly into the memory device architecture, creating an integrated system that performs cryptographic operations locally on stored data. This integration improves productivity by eliminating data transmission overhead and external processing delays, while the accepted complexity is managed through systematic design of the integrated component structure.
Data Source
AI summary
An apparatus, such as a memory system (e.g., a NAND memory system), can have a controller with a first error correction code component and a memory device (e.g., a NAND memory device) coupled to the controller. The memory device can have an array of memory cells, a second error correction code component coupled to the array and configured to correct data from the array, and a cryptographic component coupled to receive the corrected data from the second error correction code component.