NAND Memory Read and Program-Verify Voltage Adjustment for PEC Reliability
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Solution Overview
Problem
The reliability of NAND devices decreases with an increase in program-erase cycles (PEC), and existing methods that decrease program voltage step-wise to maintain reliability lead to imbalanced threshold voltage distributions, causing reliability and data retention issues.
Innovation Solution
Implementing a memory sub-system that applies read level adjustments and step decreases in program voltage based on media endurance metrics like PEC, with voltage offset values stored in metadata or LUTs, determined through threshold voltage data collection during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program voltage is decreased step-wise to maintain reliability in high PEC blocks, then reliability is improved, but threshold voltage distribution becomes imbalanced causing data retention issues
Solution Approach 1:
The patent applies different voltage offset adjustment strategies to different blocks based on their PEC counts. High PEC blocks receive larger voltage offsets to maintain reliability, while low PEC blocks use smaller offsets to preserve threshold voltage distribution balance. This localized differentiation resolves the contradiction between reliability and distribution balance.
Solution Approach 2:
The patent dynamically changes the program voltage offset parameter based on the PEC count of each block. By adjusting the voltage offset as a variable parameter according to block condition (high PEC vs. low PEC), the system maintains both reliability and threshold voltage distribution balance simultaneously.
2Reliability
If read level adjustment is applied to high PEC blocks, then RBER is reduced, but additional control complexity is introduced
Solution Approach 1:
The patent implements dynamic read level adjustment where the read voltage offset is determined based on the PEC count of each block. The system transitions from static read levels to dynamic adjustment, reducing RBER for high PEC blocks while managing complexity through automated PEC-based decision logic.
Solution Approach 2:
The patent uses PEC count information as feedback to determine appropriate read and program voltage offsets. By continuously monitoring and using PEC data to adjust voltage parameters, the system reduces RBER while the feedback mechanism itself manages the complexity through structured control flow.
Data Source
AI summary
A method for receiving a request for performing a programming operation on one or more memory blocks of a memory device, identifying a value of a media endurance metric associated with the one or more memory blocks, determining a programming voltage offset corresponding to the value of the media endurance metric, and performing, using the programming voltage offset, the programming operation on the one or more memory blocks. The method further includes identifying a program-verify voltage level associated with the one or more memory blocks, determining a program-verify voltage offset associated with the program-verify voltage level and the value of the media endurance metric, and performing, using the program-verify voltage level and the program-verify voltage offset, a program-verify operation on the one or more memory blocks.