NAND Memory Data Scrambling via Logical-Physical Address Mapping
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Solution Overview
Problem
NAND memory is prone to data dependency-related program disturb issues, particularly exacerbated by repetitive data patterns, which can lead to data corruption and inefficiencies in storage and retrieval operations.
Innovation Solution
A memory device scrambles data using a selected key that is a function of both the logical address and localized physical address, allowing for efficient relocation of data within the memory array while maintaining the same scrambling key, thus reducing program disturbs and user read disturbs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data is stored with simple addressing schemes, then device complexity is reduced, but program disturb issues occur due to repetitive data patterns
Solution Approach 1:
The patent applies parameter changes by modifying the addressing scheme from simple sequential addressing to pseudo-random addressing. The physical address is transformed using a pseudo-random number generator seeded with the logical address, changing the addressing parameter to break repetitive data patterns and eliminate program disturb issues while maintaining manageable complexity through algorithmic transformation.
2Productivity
If data relocation is performed frequently, then storage efficiency is improved, but the same scrambling key must be maintained across different physical locations
Solution Approach 1:
The patent implements universality by designing a scrambling key generation system that works universally across all physical locations. The key is determined solely by the logical address through a pseudo-random function, making it location-independent. This allows data to be relocated freely while maintaining the same scrambling key, enabling the system to serve multiple functions (storage, relocation, scrambling) with a single key management approach.
Solution Approach 2:
The system applies self-service by automatically generating the scrambling key from the logical address itself using a pseudo-random number generator. The logical address serves its own purpose as the seed for key generation, eliminating the need for external key management or lookup tables. This self-service mechanism simplifies key management while supporting frequent data relocation.
3Ease of operation
If conventional addressing schemes are used, then ease of operation is maintained, but data patterns cause program disturb and floating gate coupling
Solution Approach 1:
The patent introduces an intermediary layer in the form of a pseudo-random addressing transformation function. This intermediary sits between the simple logical address (easy for users) and the physical memory location (where data is stored). The transformation mediates between ease of operation and harm reduction by converting simple sequential addresses into pseudo-random physical addresses, breaking harmful data patterns while maintaining user-friendly logical addressing.
Data Source
AI summary
A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.