Flash Memory Controller Offset Modeling for NAND Read Reference Drift
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in enterprise applications of flash memory devices is the increasing quality deviation of read reference voltages between NAND packages, blocks, and layers, leading to reduced data reliability and difficulty in achieving ideal performance and quality of service.
Innovation Solution
A flash memory controller with an accelerator circuit that generates offset values for read reference voltages based on characteristic models, such as data retention time and cell count, to dynamically adjust and compensate default values, using linear models and lookup tables to predict optimal voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If default read reference voltage values are used without compensation, then device complexity is reduced, but data reliability deteriorates due to quality deviation between NAND packages, blocks, and layers
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing offset values in lookup tables during manufacturing or initialization. These offset values compensate for quality deviations in read reference voltages across different NAND packages, blocks, and layers before actual data reading operations occur. When reading data, the controller simply retrieves the pre-computed offset from the lookup table and applies it, avoiding complex real-time calculations while maintaining high data reliability.
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of offset values that mediate between the default read reference voltage and the actual optimal voltage required for accurate reading. The offset acts as a correction factor stored in lookup tables, allowing the system to compensate for manufacturing variations and quality deviations without requiring complex real-time measurement and adjustment circuits.
2Measurement precision
If characteristic models and offset compensation are implemented, then read error reduction is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies self-service by enabling the flash memory device to automatically compensate for its own manufacturing variations. During initialization or manufacturing testing, the device characterizes its own read reference voltage deviations and stores compensation offsets in lookup tables within the controller. This self-characterization approach eliminates the need for external precision calibration equipment or complex manufacturing processes, while still achieving high read accuracy through automatic offset application during data reading operations.
3Reliability
If dynamic offset adjustment based on data retention time and cell count is performed, then data reliability is improved, but processing time increases
Solution Approach 1:
The patent resolves this contradiction by pre-calculating offset values for different data retention times and cell count conditions during manufacturing or initialization and storing them in lookup tables. When reading data, the controller simply queries the appropriate offset from the lookup table based on the current retention time and cell count, then applies it immediately. This eliminates the need for time-consuming real-time calculations or iterative adjustments, maintaining fast read speeds while achieving high data reliability across different aging conditions.
Data Source
AI summary
A compensation method of a flash memory controller includes: providing a first input/output interface, to be coupled between a host device and an internal bus; providing a second input/output interface, to be coupled between a flash memory device and the internal bus; providing a central processing unit to manage flash memory operations; and, generating an offset value of a specific read reference voltage to compensate a default value of the specific read reference voltage as an actual optimal value based on at least one characteristic model in response to at least one of a data retention time of the flash memory device and a cell count when the default value of the specific read reference voltage is applied.