NAND Memory Pass Voltage Control for Interference Mitigation
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Solution Overview
Problem
In NAND flash memory devices, the pass voltage used to read or verify the programmed state of a selected memory cell is difficult to set due to interference from neighboring memory cells, leading to inaccuracies in determining the programmed state, especially as memory cell sizes decrease, and it is challenging to apply a negative voltage during operations.
Innovation Solution
A method is introduced to apply different pass voltages to non-selected memory cells based on their proximity to the selected memory cell, with a first pass voltage applied to the closest memory cells, a second pass voltage greater than the first to the second closest, and a third pass voltage greater than the first but less than the second to other non-selected memory cells, to minimize interference and ensure accurate reading or verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high pass voltage is applied to non-selected memory cells to ensure they are turned on, then the turn-on resistance decreases and current path is formed, but the risk of gradually programming the selected memory cell increases due to interference from neighboring cells
Solution Approach 1:
The patent applies different pass voltages to different groups of non-selected memory cells based on their proximity to the selected memory cell. Specifically, a first pass voltage is applied to a first group of non-selected memory cells, a second pass voltage is applied to a second group of non-selected memory cells, and a third pass voltage is applied to a third group of non-selected memory cells. This local differentiation allows each group to receive an optimized voltage level that balances turn-on reliability with interference mitigation.
Solution Approach 2:
The patent segments the non-selected memory cells into three distinct groups based on their spatial relationship to the selected memory cell. This segmentation enables independent voltage control for each group, allowing the system to apply higher voltages to cells that need stronger turn-on signals while applying lower voltages to cells that are closer to the selected cell and thus more prone to causing interference.
2Ease of operation
If the pass voltage is increased to turn on memory cells reliably, then the turn-on resistance decreases, but it becomes difficult to set the voltage due to the small margin and risk of programming
Solution Approach 1:
The patent implements local quality by assigning different pass voltage levels to different groups of non-selected memory cells. The first group receives a first pass voltage, the second group receives a second pass voltage, and the third group receives a third pass voltage. This approach simplifies the overall voltage setting process by breaking down the complex single-voltage problem into three more manageable voltage levels, each optimized for its specific group's requirements.
3Quantity of substance
If memory cell size is reduced to increase capacity, then storage density increases, but interference from neighboring cells increases making accurate reading difficult
Solution Approach 1:
The patent applies local quality principles by differentiating the pass voltage treatment for non-selected memory cells based on their proximity to the selected cell. Cells in the first group (closest to selected) receive a first pass voltage, cells in the second group receive a second pass voltage, and cells in the third group receive a third pass voltage. This graduated approach allows smaller memory cells to be operated accurately by providing just enough voltage to each group without excessive interference to the selected cell.
Data Source
AI summary
Provided are methods of operating NAND nonvolatile memory devices. The operating methods include applying a read voltage or a verify voltage to a selected memory cell from among a plurality of memory cells of a cell string to verify or read a programmed state of the selected memory cell; applying a first pass voltage to non-selected memory cells closest to the selected memory cell of the cell string; applying a second pass voltage to second closest non-selected memory cells to the selected memory cell; and applying a third pass voltage to other non-selected memory cells, where the first pass voltage is less than each of the second and third pass voltages and the second pass voltage is greater than the third pass voltage.