3D NAND Memory Pillar Connection Without Memory Film Etching
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Solution Overview
Problem
Current stacked type semiconductor memory devices face challenges in increasing integration density due to limitations in lithography techniques and require complex control circuits and long current paths, which lead to high ON resistance and potential damage to memory films during manufacturing.
Innovation Solution
A semiconductor memory device with a mesh-like connecting member and silicon pillars that are integrally formed, eliminating the need to remove memory films from the bottom of through-holes, thereby reducing the complexity of the control circuit and minimizing ON resistance, and featuring a charge storage layer between electrode films for efficient data storage operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory film is removed from the bottoms of through-holes by etching to connect silicon pillars to source lines, then electrical connection is achieved, but the memory film on the side surfaces of the through-holes is damaged
Solution Approach 1:
The patent forms a connecting member that extends from the source line into the through-hole space before the memory film is deposited. This preliminary structure allows the memory film to be formed continuously on the inner surfaces of through-holes without requiring subsequent removal, thus preventing damage while achieving electrical connection.
Solution Approach 2:
The connecting member acts as an intermediary structure that bridges the source line and the silicon pillar without requiring removal of the memory film. It provides a pathway for electrical connection while allowing the memory film to remain intact on the through-hole surfaces.
2Reliability
If two through-holes are caused to communicate to form a hollow for integral formation of silicon pillars and connecting member, then memory film removal is unnecessary, but the number of memory cells connected in series increases
Solution Approach 1:
The patent segments the connection structure by forming individual connecting members for each silicon pillar rather than using a shared hollow structure. This allows each memory cell to be independently connected with a shorter current path, reducing the number of series-connected cells and simplifying the control circuit.
3Productivity
If more memory cells are connected in series between source lines and bit lines, then integration density increases, but ON resistance increases due to longer current path
Solution Approach 1:
The patent transitions from a planar two-dimensional structure to a three-dimensional stacked structure with vertical through-holes. This dimensional change allows multiple memory cells to be stacked vertically, increasing integration density while maintaining shorter current paths through the vertical connection, thus reducing ON resistance.
Data Source
AI summary
A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.