3D NAND Deck Assembly with Plug Alignment for Misaligned Openings
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Solution Overview
Problem
Current NAND architecture and fabrication methods face challenges in maintaining the integrity and performance of memory cells due to issues like misaligned openings during the stacking process, leading to impaired device performance or inoperable devices.
Innovation Solution
The method involves forming a stack of alternating tiers with conductive and insulative materials, creating openings, and using plug materials to align subsequent tiers, which allows for the formation of channel-material-pillars that are electrically coupled with the conductive structure, replacing some materials with conductive ones to form memory cell levels, and ensuring proper alignment to prevent shaving of materials and maintain structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional NAND stacking process is used, then fabrication speed is maintained, but misaligned openings occur leading to impaired device performance
Solution Approach 1:
The patent applies preliminary action by forming alignment structures (such as alignment marks or alignment features) in advance during the fabrication process. These pre-formed structures enable subsequent tiers to be accurately aligned without requiring real-time adjustment, thus maintaining both high precision and fabrication speed. The alignment structures are created as part of the initial stack formation, allowing later alignment operations to be performed efficiently.
2Stability of the object's composition
If material shaving is prevented through careful alignment, then structural integrity is maintained, but fabrication complexity increases
Solution Approach 1:
The patent introduces intermediary alignment structures that act as mediators between different tiers during the stacking process. These intermediary structures (such as alignment features or buffer layers) facilitate precise positioning and prevent direct contact that could cause material shaving. By using these intermediary elements, the patent maintains structural integrity while managing fabrication complexity through standardized, repeatable alignment mechanisms.
Data Source
AI summary
Some embodiments include an integrated assembly having a second deck over a first deck. The first deck has first memory cell levels, and the second deck has second memory cell levels. A pair of cell-material-pillars pass through the first and second decks. Memory cells are along the first and second memory cell levels. The cell-material-pillars are a first pillar and a second pillar. An intermediate level is between the first and second decks. The intermediate level includes a region between the first and second pillars. The region includes a first segment adjacent the first pillar, a second segment adjacent the second pillar, and a third segment between the first and second segments. The first and second segments include a first composition, and the third segment includes a second composition different from the first composition. Some embodiments include methods of forming integrated assemblies.