NAND Read Disturb Mitigation via Charge Spike and Amortized Cleaning
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Solution Overview
Problem
Three-dimensional (3D) NAND memory devices face read disturb issues due to hot carrier injection (HCI) caused by voltage gradients during read operations, which can alter the threshold voltage of unselected memory cells, leading to data integrity concerns.
Innovation Solution
Implementing a read sequence that includes a read spike to remove residual electrons from NAND channels, followed by reading multiple groups of memory cells between the read spike and a channel clean operation, which involves raising the selected word line to a read pass voltage and then lowering all word lines to a steady state voltage, thereby reducing or eliminating read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a read operation is performed on a selected sub-block with read-pass voltage applied to unselected word lines, then read access to memory cells is enabled, but hot carrier injection causes read disturb in unselected memory cells
Solution Approach 1:
A read spike voltage is applied to the selected word line before performing the read operation to remove residual electrons from the channel. This preliminary action prevents hot carrier injection during the subsequent read operation, thereby eliminating read disturb while maintaining read access capability
Solution Approach 2:
The patent converts the harmful effect of voltage gradients during read operations into a beneficial process by using controlled voltage spikes to actively manage and remove residual electrons from channels, transforming the potential source of read disturb into a mechanism for preventing it
2Reliability
If read spike and channel clean operations are performed to eliminate read disturb, then data integrity is improved, but read time increases
Solution Approach 1:
The read spike and channel clean operations are performed periodically between reading multiple groups of memory cells. By distributing these operations across multiple read groups, the time penalty is amortized, maintaining high data integrity while minimizing the average read time per group
Solution Approach 2:
The patent maintains continuous read operations across multiple memory cell groups between the periodic read spike and channel clean operations. This continuous useful action maximizes throughput by keeping the read engine active while still performing necessary disturbance mitigation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes read disturb while maintaining efficient read times, as the time spent on the read spike and channel clean is distributed across multiple groups of memory cells, reducing the average read time per group.
Implementation Method 1
a read spike to remove residual electrons from NAND channels
Implementation Method 2
a large voltage gradient can be formed in the channel which results in electron/hole generation
Implementation Method 3
The generated electrons can be injected into the charge trap layers of the memory cells connected to the adjacent word lines and cause a hot carrier injection (HCI) type of read disturb
Implementation Method 4
The charge-trapping material is separated from a channel layer by a tunneling layer
Data Source
AI summary
Technology is disclosed for an efficient read NAND memory cells while mitigating read disturb. In an aspect, a read sequence includes a read spike that removes residual electrons from the NAND channels, followed by reading multiple different groups of memory cells, followed by a channel clean operation. The read spike and channel clean mitigate read disturb. The read spike and channel clean each take a significant amount of time to perform. However, since multiple groups of memory cells are read between the read spike and channel clean this time is essentially spread over the reading of multiple groups, thereby improving the average time to read a single group of memory cells. In one aspect, reading the multiple different groups of memory cells includes reading one or more pages from each of the groups of memory cells. In one aspect, each group is in a different sub-block.