NAND Memory Read Disturb Reduction via Pass Voltage Control

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Solution Overview

Problem

Read disturb in nonvolatile memory cells, such as floating gate and charge trapping memory cells, occurs due to the high read bias voltage causing unintended programming during read operations, leading to changes in threshold voltage over time.

Innovation Solution

Reducing the pass voltage (Vpass) below the maximum of the highest threshold voltage distribution, allowing only word line voltages less than the second maximum of the second threshold voltage distribution to be applied, ensuring the channel is turned on only for selected memory cells, thereby minimizing read disturb.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high pass voltage (Vpass) is applied to turn on the channel under unselected memory cells, then reliable reading of all data values is achieved, but read disturb occurs causing unintended programming and threshold voltage changes

Engineering Contradiction:
Improvereading reliabilityVSAvoidread disturb
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the voltage parameter of the pass line from a high voltage (sufficient to turn on any memory cell regardless of threshold voltage) to a reduced voltage level. This parameter change allows the system to distinguish between selected and unselected memory cells based on their threshold voltage distributions, thereby preventing read disturb while maintaining reading reliability for valid data values.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the threshold voltage distributions into distinct groups (first threshold voltage distribution for valid data values, second threshold voltage distribution for erased or invalid data values). By applying a reduced pass voltage that falls between these segments, the system can selectively turn on only the desired memory cells without affecting others, thus resolving the contradiction between reliable reading and preventing read disturb.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If the pass voltage (Vpass) is reduced below the maximum of the highest threshold voltage distribution, then read disturb is minimized, but the channel may not turn on for unselected memory cells storing high threshold voltage data

Engineering Contradiction:
Improveread disturbVSAvoidchannel turn-on reliability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by treating selected and unselected memory cells differently through selective voltage application. The reduced pass voltage is applied specifically to unselected memory cells, while the selected memory cell receives a higher read voltage. This localized differentiation ensures that unselected cells with high threshold voltages are not inadvertently turned on, maintaining channel turn-on reliability only where intended.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces an intermediary voltage level (the reduced pass voltage) that acts as a mediator between the two threshold voltage distributions. This intermediary voltage is high enough to turn on unselected cells with low threshold voltages (first distribution) but low enough to leave unselected cells with high threshold voltages (second distribution) turned off, thus preventing read disturb while maintaining reading capability for valid data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces read disturb by preventing unintended programming in unselected memory cells, maintaining data integrity and extending the lifespan of nonvolatile memory cells.

Implementation Method 1

reading a selected data value stored on the plurality of memory cells by measuring current flowing between the first end and the second end of the series

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS8787078B2Method and apparatus for reducing read disturb in memory
Publication Date: 2014.07.22 MACRONIX INTERNATIONAL CO LTD
  • US8787078B2 patent drawing
  • US8787078B2 patent drawing
  • US8787078B2 patent drawing

AI summary

Various aspects of a NAND memory include a control circuit that applies a read bias arrangement to a plurality of word lines to read a selected data value stored on a plurality of memory cells by measuring current flowing between the first end and the second end of the series of memory cells. The read bias arrangement is applied to word lines of the plurality of word lines applies only word line voltages less than a second maximum of a second threshold voltage distribution.