3D NAND Flash Memory Read Method for Threshold Voltage Shift Compensation
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Solution Overview
Problem
In 3D NAND flash memory, programming an adjacent word line causes a shift in the threshold voltage of the to-be-read multi-bit memory cell, leading to errors in data reading.
Innovation Solution
A method for reading memory devices that involves defining read offsets for multi-level preset read voltages, using sampling voltages to determine offset flags representing the size of read offsets, and adjusting the read process accordingly to compensate for threshold voltage shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programming is performed on adjacent word line WLn+1 during reading process, then memory device can maintain programming capability, but threshold voltage of memory cell on WLn shifts causing reading errors
Solution Approach 1:
The patent applies preliminary action by performing a verification read on the target memory cell before programming the adjacent word line. This verification read detects potential threshold voltage shifts in advance, allowing the system to adjust read voltages or compensate for deviations before they affect the actual reading operation, thus preventing reading errors while maintaining programming capability
Solution Approach 2:
The patent implements feedback by using the verification read result to dynamically adjust the read voltage for the subsequent reading operation. The system monitors the threshold voltage status through verification and feeds this information back to modify the reading process, ensuring accurate data retrieval even when adjacent word line programming causes voltage shifts
2Measurement precision
If verification read is performed before programming, then reading accuracy can be maintained, but additional time is required for verification process
Solution Approach 1:
The patent applies partial action by performing a simplified verification read that checks only the critical threshold voltage condition rather than a full reading operation. This partial verification provides sufficient information to detect potential reading errors while requiring less time than a complete read cycle, thus balancing accuracy maintenance with time efficiency
Solution Approach 2:
The verification read process serves multiple functions: it verifies the current state of the memory cell, detects threshold voltage shifts, and provides data for voltage adjustment. By making the verification process multi-functional, the patent reduces the need for separate operations, thereby minimizing the time penalty while maintaining reading accuracy
Data Source
AI summary
A method for reading a memory device is provided. The memory device includes a first word line, a second word line, and memory cells. The memory cells include first memory cells coupled to the first word line and second memory cells coupled to the second word line. Each memory cell is configured to storing M bits data, and M is a positive integer greater than or equal to 2. At least one first voltage is applied to the first word line. After applying the at least one first voltage to the first word line, a read operation of reading a first level of 2M levels of the second memory cells is performed, including performing a first and a second read operations based on a first and a second conditions respectively. The first condition is different from the second condition, and the first condition and the second condition comprise a voltage or a time.