3D NAND Read Voltage Offset Compensation for Word Line Reads
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Solution Overview
Problem
The increasing demand for storage capacity in 3D NAND flash memory, leading to smaller device sizes and more stacked layers, results in an elevated read retry ratio and degraded read performance due to threshold voltage offsets in memory cells.
Innovation Solution
An operation method that determines an offset voltage value based on the number and location of word lines in a memory block, using offset voltage information to generate an accurate read voltage for selected word lines, thereby reducing the read retry ratio and improving read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D NAND flash memory is developed toward smaller device size and more stacked layers to increase storage capacity, then storage capacity is improved, but read retry ratio increases and read performance degrades due to threshold voltage offset
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read voltage based on the number of programmed word lines (N) and the location of the selected word line. Different offset voltage values are selected from a table based on these parameters, compensating for the threshold voltage offset caused by charge trapping in stacked layer structures. This resolves the contradiction by maintaining reliable reads (lower retry ratio) while supporting high storage capacity through multi-layer stacking.
2Quantity of substance
If 3D NAND flash memory is developed toward smaller device size and more stacked layers to increase storage capacity, then storage capacity is improved, but read performance degrades due to threshold voltage offset
Solution Approach 1:
The patent changes the read voltage parameter dynamically based on the programming state of the memory block. By selecting appropriate offset voltage values from a pre-established table according to the number of programmed word lines and selected word line location, the system compensates for threshold voltage shifts. This maintains high read performance while enabling increased storage capacity through additional stacked layers.
3Reliability
If offset voltage compensation is applied based on word line number and location, then read performance is improved and read retry ratio is reduced, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing offset voltage values in a lookup table before actual read operations. The table is organized based on the number of programmed word lines (N) and selected word line locations. During read operations, the controller simply queries the table using these parameters to obtain the appropriate offset voltage, avoiding complex real-time calculations. This reduces control complexity while maintaining improved read reliability.
4Productivity
If offset voltage compensation is applied based on word line number and location, then read performance is improved and read retry ratio is reduced, but device complexity increases
Solution Approach 1:
The patent performs preliminary computation by pre-establishing the offset voltage lookup table during manufacturing or initialization. The table contains pre-calculated offset values for different combinations of programmed word line counts and selected word line positions. During operation, the controller only needs to perform simple table lookup based on current read parameters, significantly reducing computational complexity while maintaining high read performance.
5Quantity of substance
If the number of stacked layers is increased to increase storage capacity, then storage capacity is improved, but threshold voltage offset increases causing degraded read performance
Solution Approach 1:
The patent compensates for threshold voltage offset by dynamically changing the read voltage parameter based on the number of programmed word lines and selected word line location. The offset voltage table provides correction values that account for charge trapping effects in multi-layer stacked structures. This maintains accurate threshold voltage measurement (improved read performance) while supporting increased storage capacity through additional stacked layers.
Data Source
AI summary
The present disclosure provides an operation method of a memory system, a data read method of a memory, and a memory system. The operation method includes: first determining an offset voltage value corresponding to a selected word line of N word lines according to a number N of the N word lines and offset voltage information, wherein the N word lines are word lines adjacently disposed in a memory block of a memory, data is stored in K memory cells coupled with the N word lines, K and N are positive integers, and the offset voltage information is used for indicating the offset voltage value corresponding to N; and then sending a data read command to the memory, wherein the data read command is used for instructing the memory to generate a read voltage according to the offset voltage value and apply the read voltage to the selected word line.


