NAND Read Reference Adjustment for Cross-Temperature Drift
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Solution Overview
Problem
Existing memory systems face challenges in determining suitable read reference levels for non-volatile memory cells to minimize bit errors due to cross-temperature effects and data retention issues, which conventional error correction algorithms cannot adequately address.
Innovation Solution
A memory system dynamically updates read reference levels to compensate for both cross-temperature and data retention effects by determining read level offsets based on shifts in threshold voltage distributions, using on-chip bitscan logic to adjust read voltages accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction algorithms are used to detect and correct data errors, then some errors can be corrected, but the bit error rate remains high when sensed states vary from written states due to cross-temperature effects and data retention issues
Solution Approach 1:
The system performs preliminary sensing operations at multiple read reference voltages before final data retrieval. By proactively sensing at multiple reference voltages and determining which reference voltage yields the lowest bit error rate, the system prepares optimal reading conditions in advance, preventing high error rates before they affect data integrity
Solution Approach 2:
The system dynamically changes the read reference voltage parameter based on sensed states and bit error rate measurements. By adjusting the read reference voltage to different levels and selecting the optimal reference voltage that minimizes bit errors, the system adapts to cross-temperature effects and data retention variations, resolving the contradiction between error correction capability and bit error rate
2Loss of information
If read reference voltages are moved and re-reading is performed to reduce bit errors, then fewer bits in errors occur, but additional sensing operations increase time consumption
Solution Approach 1:
The system performs a limited number of sensing operations at multiple read reference voltages rather than exhaustive searching. By sensing at a predetermined set of reference voltages and selecting the optimal one, the system achieves sufficient error reduction without excessive time consumption, balancing partial action with acceptable performance
3Loss of information
If multiple sensing operations are performed at different read reference voltages to determine optimal reading conditions, then bit error rates decrease, but the complexity of the reading process increases
Solution Approach 1:
The system uses feedback from preliminary sensing operations to determine the optimal read reference voltage. By measuring bit error rates at different reference voltages and using this feedback to select the optimal reference voltage for final data retrieval, the system reduces reading process complexity while maintaining low bit error rates through intelligent adaptive selection
Data Source
AI summary
Technology for dynamically updating read references levels in NAND memory. A memory system compensates for both cross-temperature (TempX) effects and data retention (DR) effects. The Vt of a NAND memory cell transistor may depend on the temperature, which leads to the TempX effect. The DR effect is due to a change in charge in the memory cell between programming and sensing. The memory system senses a group of memory cells at two Vt distributions to determine a shift in each Vt distribution. One of the Vt distribution may exhibit a greater shift due to the TempX effect than the DR effect. The other Vt distribution may exhibit a greater shift due to the DR effect than the TempX effect. The memory system determines one or more read level offsets based on both the first shift and the second shift.