NAND Read Decoding Order Using Voltage History Dispersion

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Solution Overview

Problem

Current data storage apparatuses face challenges in improving read performance due to decoding failures in nonvolatile memory devices, which can lead to inefficient data retrieval and increased power consumption.

Innovation Solution

A data storage apparatus with a controller that decodes normal read data, calculates the standard deviation of history read voltages for a target memory block, and determines a decoding type and order based on threshold comparisons to optimize decoding operations, thereby reducing unnecessary read times and enhancing read performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If normal read operations are performed on memory cells, then data retrieval speed is improved, but decoding failures occur leading to reduced reliability

Engineering Contradiction:
Improvedata retrieval speedVSAvoiddecoding success rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs preliminary actions by calculating the standard deviation of history read voltages before attempting decoding operations. This preliminary analysis of voltage distribution characteristics allows the system to predict potential decoding failures and adjust read strategies in advance, thereby improving both retrieval speed and reliability by avoiding unsuccessful decode attempts.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms by continuously monitoring decoding results and adjusting read voltage strategies based on standard deviation calculations. When decoding failures occur, the system uses the calculated standard deviation to determine whether to adjust read voltages or change decoding strategies, creating a closed-loop system that improves reliability while maintaining speed through intelligent retry decisions.

Inventive Principle:
Principle #23Feedback

2Reliability

If repeated read attempts are made after decoding failure, then data retrieval completeness is improved, but power consumption increases

Engineering Contradiction:
Improvedata retrieval completenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system changes parameters by calculating the standard deviation of history read voltages to determine the optimal read strategy. Based on the standard deviation value compared against threshold values, the system dynamically adjusts read voltage levels and decoding strategies, ensuring complete data retrieval while minimizing power consumption by avoiding unnecessary repeated reads when the standard deviation indicates low risk of decoding failure.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If standard deviation calculation and threshold comparison are performed, then decoding strategy optimization is improved, but processing complexity increases

Engineering Contradiction:
Improvedecoding efficiencyVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system replaces complex mechanical or hardware-based decoding optimization mechanisms with computational methods. By using standard deviation calculation and threshold comparison algorithms, the system achieves decoding strategy optimization through software-based processing, which reduces hardware complexity while improving decoding efficiency through intelligent, data-driven decision-making.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10581458B2Data storage apparatus and operating method thereof
Publication Date: 2020.03.03 SK HYNIX INC
  • US10581458B2 patent drawing
  • US10581458B2 patent drawing
  • US10581458B2 patent drawing

AI summary

A data storage apparatus includes a nonvolatile memory device and a controller configured to decode on normal read data read from a target memory cell, calculate a standard deviation of history read voltages for a target memory block including the target memory cell when the decoding of the normal read data fails, compare the calculated standard deviation with a preset first threshold value and a preset second threshold value, and determine a decoding type and a decoding order for the target memory cell based on a comparison result.