NAND Read Verify Voltage Offsets for Multi-Pass Programming Errors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory structures experience increased read errors due to electron interference and threshold voltage shifts during programming, leading to performance and durability issues, especially in partially programmed memory blocks that become fully programmed subsequently.
Innovation Solution
A method and system that determine optimal read verify voltage levels by calculating supplemental offsets based on pre-calibrated lookup tables, adjusting for unintended voltage shifts, and applying these levels during read operations in both initially and later programmed memory portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a memory block is programmed in multiple cycles (partially programmed then fully programmed), then storage flexibility and programming efficiency are improved, but read errors increase due to electron interference and threshold voltage shifts
Solution Approach 1:
The patent applies preliminary action by performing a bit count scan and determining optimal read verify voltage levels before actual read operations. The system pre-calculates the number of programmed bits in each word line and adjusts voltage offsets accordingly, so that when read operations occur later, the voltage levels are already optimized to account for electron interference and threshold voltage shifts caused by multi-cycle programming.
Solution Approach 2:
The patent changes parameters by dynamically adjusting read verify voltage levels based on the programming state. The system modifies voltage offsets for different word lines depending on how many bits have been programmed into them, using lookup tables that map bit counts to appropriate voltage adjustments. This parameter change compensates for the threshold voltage shifts that occur during multi-cycle programming.
2Device complexity
If read verify voltage levels are fixed, then device complexity is reduced, but measurement precision deteriorates due to unintended voltage shifts in partially programmed blocks
Solution Approach 1:
The patent applies dynamics by making read verify voltage levels adaptive rather than fixed. The system dynamically determines the number of programmed bits in each word line through bit count scans, then adjusts the read verify voltage offsets based on these counts using pre-calibrated lookup tables. This dynamic adjustment ensures high measurement precision across different programming states without requiring complex real-time voltage generation circuitry.
Solution Approach 2:
The patent uses lookup tables as intermediaries between the bit count measurement and the voltage level selection. Instead of directly computing complex voltage adjustments, the system measures the bit count, queries a pre-calibrated lookup table for the appropriate voltage offset, and applies that offset. This intermediary approach maintains measurement precision while keeping the voltage control logic relatively simple.
3Device complexity
If electron interference is not compensated, then device complexity remains low, but manufacturing precision suffers due to threshold voltage shifts in initially programmed portions
Solution Approach 1:
The patent implements feedback by performing bit count scans to measure the actual programming state of each word line, then using this measured information to adjust read verify voltage levels. The system continuously monitors the number of programmed bits and feeds this information back into the voltage adjustment process through lookup tables, compensating for electron interference and threshold voltage shifts that occur during multi-cycle programming operations.
Solution Approach 2:
The patent applies preliminary action by pre-calibrating lookup tables that map bit counts to optimal voltage offsets. These lookup tables are generated in advance based on characterized threshold voltage shifts for different programming states. During operation, the system simply queries these pre-computed values rather than performing complex real-time calculations, achieving precise compensation with minimal added complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces read errors by accurately determining optimal read verify voltage levels, enhancing memory performance and durability by mitigating the effects of electron interference and voltage shifts.
Implementation Method 1
each memory cell is comprised of a floating gate that is positioned above and isolated from a channel region of a semiconductor substrate... wherein a threshold voltage (Vth) of the memory cell transistor is controlled by and dependent upon the amount of charge that is retained on the transistor's floating gate
Implementation Method 2
Non-volatile memory structures experience increased read errors due to electron interference and threshold voltage shifts during programming
Data Source
AI summary
A method for performing a read operation of a fully programmed non-volatile memory that, initially, was partially programmed, the method comprising: selecting a word line within an initially programmed portion; applying a read to the selected word line, determining a first “optimal” read verify voltage level for each program state; once fully programmed, applying a read to the selected word line, determining a second “optimal” read verify voltage level for each program state; for each program state, determining a difference between the first “optimal” read verify voltage level and the second “optimal” read verify voltage level, the difference defining a supplemental offset value; determining an “optimal” read verify voltage level for each program state by applying the supplemental offset value in conjunction with an initial offset value defined in a pre-calibrated “lookup” table; and applying a read to each word line according to each determined “optimal” read verify voltage level.