NAND Flash Read Voltage Search for Threshold Shift Accuracy
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Solution Overview
Problem
Existing NAND flash memory systems face challenges in accurately determining read voltages due to shifts in threshold distributions of memory cell transistors, leading to increased error rates and difficulty in correctly reading data.
Innovation Solution
A memory system with a controller that performs a patrol operation to search for optimal read voltages by performing shift read operations and tracking operations to determine the intersection points of threshold distributions, allowing for precise read voltage determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional read operations are used without voltage optimization, then the operation is simple and fast, but the error rate increases due to threshold distribution shifts
Solution Approach 1:
The patent performs patrol operations and threshold distribution measurements before actual data read operations to determine optimal read voltages. By pre-characterizing the memory device's threshold distributions and storing this information, the system prepares voltage optimization data in advance, ensuring high read accuracy when needed without adding complexity to the critical data path operations.
Solution Approach 2:
The memory device performs self-diagnosis and self-characterization through patrol operations, measuring its own threshold distributions and determining its own optimal read voltages. This self-service approach eliminates the need for external calibration equipment or complex controller interventions, allowing the device to maintain its own performance characteristics autonomously.
2Measurement precision
If patrol operations are performed frequently to maintain read accuracy, then data read accuracy improves, but the time consumption and operational overhead increase
Solution Approach 1:
The patent implements patrol operations as periodic maintenance tasks rather than continuous operations. The controller performs threshold distribution measurements and read voltage determinations at scheduled intervals or under specific conditions (e.g., after erase operations, when errors are detected), balancing measurement precision needs with time efficiency by not continuously monitoring parameters that change slowly.
Solution Approach 2:
The patent combines multiple functions into the patrol operation: threshold distribution measurement, read voltage determination, and verification all occur in a single integrated operation sequence. This merging reduces the total time required compared to performing these functions separately, as common setup and teardown operations are shared across all functions.
3Reliability
If shift read operations are performed to determine optimal read voltages, then error bits are minimized, but the number of operations and processing time increase
Solution Approach 1:
The patent performs shift read operations and optimal voltage determination during patrol operations as preliminary characterization, storing the results for use in subsequent data read operations. This separates the time-consuming optimization process from the critical data path, allowing rapid data retrieval using pre-determined voltages without repeating the lengthy shift read sequence for each data access.
Solution Approach 2:
The patent creates a copy of the threshold distribution characteristics and optimal voltage settings determined during patrol operations, storing this information in lookup tables or configuration memory. During actual data read operations, the system uses these pre-determined voltage copies rather than performing full shift read sequences, dramatically reducing processing time while maintaining the error reduction benefits.
Data Source
AI summary
According to one embodiment, a memory system includes a semiconductor memory device and a controller. The device includes a plurality of memory cells capable of storing at least first to third data and a word line coupled to the plurality of memory cells. The first data is determined by a first read operation including a first read level. The second data is determined by a second read operation including a second read level. The third data is determined by a third read operation including a third read level. The controller controls the semiconductor memory device to perform a forth read operation including the first and second read levels in a search operation for first to third read voltages corresponding to the first to third read levels, respectively.