NAND Flash Memory Read-Voltage Tracking for Multi-Level Accuracy
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Solution Overview
Problem
Existing NAND flash memory systems face challenges in accurately determining read voltages due to shifts in threshold distributions of memory cell transistors, leading to increased error rates and difficulty in reading multi-level data reliably.
Innovation Solution
A memory system with a controller that performs a patrol operation to track and adjust read voltages by performing shift read operations and tracking operations to determine optimal read levels, using a 4-4-3-4 code allocation for 4-bit data storage in NAND flash memory, and employing a dedicated circuit for managing memory space and performing error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level data storage is implemented in NAND flash memory, then storage capacity is improved, but reading accuracy deteriorates due to threshold distribution shifts
Solution Approach 1:
The patent performs patrol operations and threshold voltage tracking before actual data reading to determine optimal read voltages. By proactively adjusting read voltages based on detected threshold distribution shifts, the system prepares the reading conditions in advance, ensuring accurate reading of multi-level data despite drift in memory cell characteristics.
Solution Approach 2:
The patent implements a feedback mechanism where read operations detect actual data states, and this information feeds back to adjust subsequent read voltages. The system continuously monitors threshold voltage distributions and modifies read voltage levels accordingly, creating a closed-loop control system that maintains reading accuracy in multi-level storage.
2Measurement precision
If read voltages are adjusted to track threshold distribution shifts, then reading accuracy is improved, but system complexity increases due to patrol operations
Solution Approach 1:
The patent implements on-chip threshold voltage tracking and patrol operations that automatically adjust read voltages without external intervention. The memory device performs self-diagnosis and self-correction by detecting its own threshold distribution shifts and adjusting its read voltage parameters accordingly, reducing the need for complex external control circuitry.
3Reliability
If patrol operations are performed frequently to maintain read accuracy, then data reliability is improved, but processing time increases
Solution Approach 1:
The patent performs patrol operations periodically rather than continuously, balancing the need for accurate read voltage determination with processing time constraints. By scheduling threshold voltage tracking at appropriate intervals and performing it during idle periods or in conjunction with other memory operations, the system maintains data reliability while minimizing impact on overall processing throughput.
Data Source
AI summary
According to one embodiment, a memory system includes a semiconductor memory device and a controller. The device includes a plurality of memory cells capable of storing at least first to third data and a word line coupled to the plurality of memory cells. The first data is determined by a first read operation including a first read level. The second data is determined by a second read operation including a second read level. The third data is determined by a third read operation including a third read level. The controller controls the semiconductor memory device to perform a forth read operation including the first and second read levels in a search operation for first to third read voltages corresponding to the first to third read levels, respectively.