3D NAND Redundant Stripe ECC for Multi-Word-Line Error Correction
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Solution Overview
Problem
Existing memory devices face challenges in efficiently correcting multiple data errors during reading operations, particularly in three-dimensional NAND type memories, where conventional error correction methods are inadequate for handling errors across multiple memory cells on a word line.
Innovation Solution
The memory device employs a redundant stripe structure that includes first and second redundant stripes to store check data, obtained through error correction coding on data from adjacent string areas, allowing for effective correction of multiple data errors by utilizing check data from both the current and adjacent word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction methods are used, then device complexity is reduced, but reliability deteriorates due to inadequate error correction capability
Solution Approach 1:
The memory device segments the storage structure into first string areas, second string areas, and redundant stripes, with each segment serving a specific function in error correction. This segmentation allows distributed error correction across multiple word lines while maintaining manageable complexity through modular organization
Solution Approach 2:
The redundant stripes serve multiple functions: storing check data for current word line errors, providing correction data for adjacent word lines, and enabling correction of multiple simultaneous errors. This multi-functionality improves reliability without proportionally increasing device complexity
2Reliability
If check data is stored for each word line independently, then reliability is improved, but storage efficiency deteriorates due to resource wastage
Solution Approach 1:
Adjacent word lines share common redundant stripes for error correction. The first redundant stripe of one word line can serve as the second redundant stripe for the adjacent word line, merging correction resources to improve storage efficiency while maintaining comprehensive error protection
Solution Approach 2:
The error correction structure extends across the word line dimension, where check data from one word line can correct errors in adjacent word lines. This dimensional approach allows efficient resource sharing and reduces redundant storage requirements
Data Source
AI summary
Examples of the present disclosure provide a memory device, a memory system and an operation method of the memory system, and a storage medium. The memory device includes: multiple word lines, where a plurality of strings coupled to each of the word lines are divided into a first string area and a second string area; and at least one redundant stripe corresponding to each of the word lines, where the redundant stripe comprises a first redundant stripe which is configured to store first check data. The first check data is obtainable by performing error correction coding on data in a first string area of a word line where the first redundant stripe is located and data in a second string area of a word line adjacent to the word line where the first redundant stripe is located.