NAND Select Gate Voltage Lowering for Program Disturb
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Solution Overview
Problem
In NAND flash memory systems, program disturb occurs due to unintended turning on of select transistors in unselected NAND strings, leading to improper channel voltage boosting and data corruption during programming operations.
Innovation Solution
Progressively lowering the gate-to-source voltage (Vgs) applied to select transistors of unselected NAND strings as programming progresses, along with adjusting inhibit voltages based on the programming status of adjacent NAND strings, helps prevent unintentional turning on of select transistors and maintains proper channel boosting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a constant gate-to-source voltage is applied to select transistors of unselected NAND strings during programming, then the select transistors remain reliably turned off to prevent program disturb, but the channel voltage boosting becomes improper leading to data corruption
Solution Approach 1:
The patent applies dynamic voltage adjustment to the select transistors of unselected NAND strings. Instead of using a constant gate-to-source voltage, the voltage is progressively lowered during the programming operation. This dynamic adjustment allows the select transistors to remain reliably off initially (preventing program disturb) while gradually allowing proper channel voltage boosting as programming progresses, thus resolving the contradiction between reliability and manufacturing precision.
2Manufacturing precision
If the gate-to-source voltage of select transistors is lowered to allow proper channel boosting, then manufacturing precision improves, but the select transistors may unintentionally turn on causing program disturb
Solution Approach 1:
The patent uses progressive voltage lowering during the programming operation. The gate-to-source voltage is not immediately lowered to the level needed for proper channel boosting, but is gradually reduced over multiple programming pulses. This dynamic approach ensures that select transistors remain reliably off during early programming stages (preventing program disturb) while allowing proper channel voltage boosting to occur as programming progresses, thus resolving the contradiction between manufacturing precision and program disturb prevention.
3Object-affected harmful factors
If programming is inhibited by applying inhibit voltage to bit lines, then program disturb is reduced, but the select transistor control becomes complex requiring coordinated voltage adjustments
Solution Approach 1:
The patent extracts the select transistor voltage control from the standard inhibit mechanism. Instead of relying solely on bit line inhibit voltages to prevent program disturb, the invention separately controls the gate-to-source voltage of select transistors in unselected NAND strings by progressively lowering it. This extraction simplifies the overall control strategy by providing a direct method to prevent program disturb through select transistor control, reducing the need for complex coordinated voltage adjustments across multiple lines.
Data Source
Figure 1A~1B
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AI summary
Techniques disclosed herein may prevent program disturb by preventing a select transistor of an unselected NAND string from unintentionally turning on. The Vgs of a select transistor of a NAND string may be lowered from one programming pulse to the next programming pulse multiple times. The select transistor may be a drain side select transistor or a source side select transistor. Progressively lowering the Vgs of the select transistor of an unselected NAND string as programming progresses may prevent the select transistor from unintentionally turning on. Therefore, program disturb is prevented or reduced. Vgs may be lowered by applying a lower voltage to a select line associated with the select transistor. Vgs may be lowered by applying a higher voltage to bit lines associated with the unselected NAND strings as programming progresses. Vgs may be lowered by applying a higher voltage to a common source line as programming progresses.