NAND Die Self-Initialization for Faster Memory Wakeup

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Solution Overview

Problem

Serialized performance of wakeup and initialization procedures in memory systems, particularly in NAND dies, leads to increased startup delays and latency, which is undesirable for high-performance applications like AI, AR, VR, and gaming.

Innovation Solution

Implementing an automatically-triggered initialization procedure for NAND dies prior to the completion of the wakeup procedure, allowing concurrent or parallel execution of these processes, reducing latency by performing initialization before the wakeup procedure is finished.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If wakeup procedure is performed before initialization procedure, then controller is ready to operate, but startup delay increases

Engineering Contradiction:
Improvestartup delayVSAvoidprocedure coordination complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The initialization procedure is triggered automatically by the die in advance, before the controller completes its wakeup procedure. This preliminary action allows the die to be ready for operations before the controller finishes waking up, eliminating the need to wait for sequential completion and reducing startup delay.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The die performs self-initialization automatically upon detecting voltage thresholds without requiring controller intervention. This self-service mechanism eliminates the need for the controller to manage the initialization timing, simplifying the coordination complexity while enabling parallel execution.

Inventive Principle:
Principle #25Self-service

2Speed

If initialization procedure is performed in parallel with wakeup procedure, then latency is reduced, but procedure coordination becomes more complex

Engineering Contradiction:
Improveinitialization speedVSAvoidprocedure coordination complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The die autonomously detects voltage thresholds and triggers its own initialization procedure without controller management. This self-service approach enables parallel execution with the controller's wakeup procedure while avoiding the complexity of coordinated control, as each component operates independently based on its own conditions.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The die monitors voltage levels as feedback signals to determine when to initiate initialization. This feedback mechanism allows the die to automatically synchronize its initialization timing with the power-up state, enabling parallel execution without requiring complex external coordination.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250378884A1Techniques for non-volatile memory initialization
Publication Date: 2025.12.11 MICRON TECHNOLOGY INC
  • US20250378884A1 patent drawing
  • US20250378884A1 patent drawing
  • US20250378884A1 patent drawing

AI summary

Methods, systems, and devices for techniques for non-volatile initialization, such as not-and (NAND) initialization, are described. One or more dies of a memory system may perform an automatically-triggered initialization procedure prior to one or more controllers of the memory system completing a wakeup procedure. For example, the memory system may transition from an idle state to an awake. Accordingly, the one or more dies may perform an initialization procedure in response to a first voltage source, a second voltage source, or both, satisfying respective thresholds, such as by reaching a ready state. After, or in conjunction with, the initialization procedure, the one or more controllers may perform the wakeup procedure in response to the transition of the memory system from the idle state to the awake state, such that the wakeup procedure is performed after a start of, or simultaneously with, the initialization procedure at the one or more dies.