Dynamic SSPC Detection in NAND Memory Sensing Circuits
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Solution Overview
Problem
In 3D NAND memory arrays, the uneven programming of cells leads to a widening distribution of threshold voltage (Vt), causing some cells to charge faster and trap more charge, which results in inefficiencies in data programming and storage.
Innovation Solution
The system employs selective slow programming convergence (SSPC) detection based on subthreshold slope (SS) to identify cells that are close to passing the verify operation, allowing for the modulation of bitline voltage to limit charge injection and apply a boost voltage to capture the expected number of SSPC cells during program verify.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional program verify operations are used without SSPC detection, then the programming process is simpler and faster, but the threshold voltage distribution widens and programming precision deteriorates
Solution Approach 1:
The patent performs SSPC detection before the main program verify operation to identify cells that require selective slow programming. By detecting SSPC cells in advance using subthreshold slope measurements and predicting their count, the system prepares appropriate verify voltages for these cells, ensuring precise threshold voltage control without disrupting the overall programming speed.
Solution Approach 2:
The patent segments the program verify operation into two distinct phases: standard program verify for normal cells and selective slow programming verify for SSPC cells. This segmentation allows each cell type to receive optimized verify operations, with SSPC cells getting extended verify pulses at reduced voltage to prevent over-programming, while other cells proceed with standard verification.
2Reliability
If program verify is performed for all cells with standard voltage, then the process is faster, but SSPC cells may be misdetected or over-programmed
Solution Approach 1:
The patent changes the verify voltage parameter dynamically based on cell type. SSPC cells are detected using subthreshold slope measurements and then subjected to extended program verify pulses with reduced voltage (PV_SSPC = PV - DVT_SSPC), while non-SSPC cells receive standard verify pulses. This parameter adaptation ensures accurate detection and programming of SSPC cells without significantly impacting overall programming speed.
Solution Approach 2:
The patent creates a copy of the program verify operation specifically for SSPC cells, using a modified verify voltage sequence. The SSPC detection and extended verify process is implemented as a parallel pathway that mirrors the standard program verify but with adjusted parameters, allowing simultaneous processing of different cell types with appropriate voltage levels.
3Adaptability or versatility
If the subthreshold slope is fixed, then the detection process is simpler, but it cannot adapt to changes in operating conditions
Solution Approach 1:
The patent implements dynamic detection of subthreshold slope by measuring the actual SS of memory cells during operation and using this measured value to predict the number of SSPC cells. This dynamic approach replaces fixed, pre-determined SS values with real-time measurements, allowing the system to adapt to changing operating conditions such as temperature variations and device aging, thereby improving detection accuracy without requiring complex adaptive mechanisms.
Data Source
AI summary
For a nonvolatile (NV) storage media such as NAND media that is written by a program and program verify operation, the system can determine an expected number of SSPC (selective slow programming convergence) cells for a page of cells for specific conditions of the page. The system can perform program verify with a first wordline (WL) select voltage for SSPC cell detection for a first write of the page to detect the expected number of SSPC cells. Based on the determined expected number of SSPC cells, the system can set a boost voltage to capture an expected number of SSPC cells during the program verify operation. The system performs program verify for subsequent writes to the page with a higher WL select voltage, to perform program verify for standard cells and then SSPC program verify with the boost voltage determined from the first write.


