3D NAND Soft Programming Using Verified Pulse Transfer

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Solution Overview

Problem

The increasing density of 3D NOR flash memory leads to longer total erase times due to the conventional bit-by-bit soft programming method, which requires applying multiple programming pulses to each word line, thereby degrading memory device performance.

Innovation Solution

A method where the initial value of programming pulses for subsequent word lines is determined based on the verification results of previous word lines, reducing the number of pulses needed by starting from an optimal shot rather than the first shot, and optimizing the soft programming operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple programming pulses are applied to each word line starting from the first shot, then the soft programming operation can increase the lower bound value and make the erase state distribution more compact, but the total erase time becomes longer

Engineering Contradiction:
Improveerase state distribution compactnessVSAvoidtotal erase time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing soft programming on a first word line before processing subsequent word lines. The verification result from the first word line is used to determine the initial programming pulse shot for subsequent word lines, allowing them to skip earlier shots and reduce total processing time while maintaining erase state quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the verification result from the first word line to dynamically adjust the initial programming pulse shot for subsequent word lines. This feedback mechanism allows the system to optimize processing by skipping unnecessary programming shots for word lines that require fewer pulses to achieve the desired erase state

Inventive Principle:
Principle #23Feedback

2Reliability

If the soft programming operation is performed on each word line with all programming pulses starting from the first shot, then the lower bound value can be increased, but the time of total erasing operation increases

Engineering Contradiction:
Improvelower bound valueVSAvoiderasing operation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by performing soft programming on a first word line before processing subsequent word lines. The verification result from the first word line is used to determine the initial programming pulse shot for subsequent word lines, allowing them to skip earlier shots and reduce total processing time while maintaining erase state quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by not requiring all programming pulses to be applied to every word line. Instead, the initial shot is dynamically determined based on verification results, allowing subsequent word lines to use fewer pulses (partial action) while still achieving the required lower bound value and erase state compactness

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12603140B2Soft programming method and erasing method for memory device
Publication Date: 2026.04.14 MACRONIX INTERNATIONAL CO LTD
  • US12603140B2 patent drawing
  • US12603140B2 patent drawing
  • US12603140B2 patent drawing

AI summary

A soft programming method and an erasing method for a memory device having n (positive integer) word lines are provided. The soft programming method includes: applying m (positive integer) programming pulses to the j-th word line of the n word lines, where j is a positive integer smaller than n; and determining an initial value of a programming pulse applied to the (j+1)-th to the n-th word lines based on a verification result of applying the m programming pulses to the j-th word line. When the i-th programming pulse, among the m programming pulses applied to the j-th word line, passes verification, the i-th programming pulse is set as the initial value of the programming pulse for the (j+1)-th to the n-th word lines, where i=1 to m. This method is also applicable to a 3D NAND flash memory. The memory device has high capacity and high performance.