3D NAND Storage Node Layout to Limit Lateral Charge Migration
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Solution Overview
Problem
As 3D NAND devices are miniaturized, cell-to-cell coupling and lateral charge migration increase, leading to program erase and data retention issues due to reduced dimensions and closer spacing of memory cells.
Innovation Solution
The electronic device incorporates reduced charge confinement regions in storage nodes of pillars, with a oxide material laterally adjacent to dielectric and conductive materials, and a storage node extending continuously in a vertical direction, allowing for increased separation distance between charge confinement regions while maintaining continuous vertical alignment, thereby reducing lateral charge migration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are formed closer together and at smaller dimensions to increase integration density, then device integration density is improved, but cell-to-cell coupling and lateral charge migration increase causing program erase and data retention issues
Solution Approach 1:
The storage node is segmented into multiple charge confinement regions along the vertical direction, with each region having a height less than the conductive material height. This segmentation creates isolated charge storage zones that prevent lateral charge migration between neighboring memory cells while maintaining high integration density.
Solution Approach 2:
The charge confinement regions are positioned in horizontal alignment with conductive materials and separated by insulative material regions. This local differentiation creates zones with distinct electrical properties - conductive regions for charge storage and insulative regions for charge isolation - thereby preventing charge leakage and improving data retention.
2Reliability
If charge confinement regions are separated vertically to reduce lateral charge migration, then data retention is improved, but the continuous vertical alignment of storage nodes is disrupted
Solution Approach 1:
The storage node is divided into multiple discrete charge confinement regions separated by insulative material regions. Each charge confinement region maintains vertical alignment with conductive materials, preserving the overall vertical structure while creating electrical isolation between regions to prevent charge migration.
Solution Approach 2:
Insulative material regions are introduced as intermediary elements between adjacent charge confinement regions. These intermediary regions physically separate the charge storage zones while maintaining the continuous vertical alignment of the storage node structure, thereby preventing charge leakage without disrupting the overall architectural integrity.
3Ease of operation
If the height of charge confinement regions is reduced to improve control over wordlines, then device control is improved, but charge storage capacity may be reduced
Solution Approach 1:
The storage node is segmented into multiple charge confinement regions, each with reduced height compared to the conductive material height. This segmentation improves wordline control by limiting the vertical extent of charge confinement, while the cumulative capacity across multiple regions maintains overall charge storage capability.
Solution Approach 2:
The height parameter of charge confinement regions is optimized to be less than the conductive material height. This parameter change enables better electrostatic control and reduced coupling between adjacent memory cells, while the number and distribution of regions are adjusted to maintain sufficient charge storage capacity.
Data Source
AI summary
An electronic device comprises a stack of alternating dielectric materials and conductive materials, a pillar region extending vertically through the stack, an oxide material within the pillar region and laterally adjacent to the dielectric materials and the conductive materials of the stack, and a storage node laterally adjacent to the oxide material and within the pillar region. A charge confinement region of the storage node is in horizontal alignment with the conductive materials of the stack. A height of the charge confinement region in a vertical direction is less than a height of a respective, laterally adjacent conductive material of the stack in the vertical direction. Related methods and systems are also disclosed.