NAND String Channel Voltage Boosting for Word Line Load Reduction
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Solution Overview
Problem
High integration and memory capacity in three-dimensional NAND memory devices lead to increased signal line loads, resulting in decreased operation speed.
Innovation Solution
A method and memory device where the voltage of a selected word line is increased to boost and then decreased to discharge the channel voltage of unselected NAND strings, reducing the load on the selected word line by coordinating changes in both voltages in the same direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the integration degree and memory capacity are increased in three-dimensional NAND memory devices, then the storage capacity is improved, but the load of signal lines increases resulting in decreased operation speed
Solution Approach 1:
The patent applies preliminary action by boosting the channel voltage of unselected NAND strings before the selected word line voltage increases. This preparatory voltage boost reduces the capacitive load that the selected word line must charge, thereby reducing the voltage setup time and maintaining faster operation speeds even as memory capacity increases through higher integration.
2Measurement precision
If the voltage of the selected word line is increased to perform sensing operation, then the read capability is improved, but the load on the selected word line increases resulting in increased voltage setup time
Solution Approach 1:
The patent applies the anti-weight principle by introducing a counteracting effect through voltage boosting of unselected NAND strings. This boost creates a counter-voltage effect that offsets part of the voltage change required on the selected word line, thereby reducing the net voltage setup time while maintaining the necessary sensing capability.
Solution Approach 2:
By preliminarily boosting the channel voltage of unselected strings before the selected word line voltage transition, the patent reduces the total voltage change burden on the selected word line, thereby reducing the voltage setup time while preserving sensing operation effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces voltage setup times and enhances the operation speed of the memory device by minimizing the load on the selected word line during voltage changes.
Implementation Method 1
floating an unselected NAND string among the plurality of NAND strings when the voltage of the selected word line is increased such that a channel voltage of the unselected NAND string is boosted
Implementation Method 2
discharging the channel voltage of the unselected NAND string when the voltage of the selected word line is decreased
Data Source
AI summary
To operate a memory device including a plurality of NAND strings, an unselected NAND string among a plurality of NAND strings is floated when a voltage of a selected word line is increased such that a channel voltage of the unselected NAND string is boosted. The channel voltage of the unselected NAND string may be discharged when the voltage of the selected word line is decreased. The load when the voltage of the selected word line increases may be reduced by floating the unselected NAND string to boost the channel voltage of the unselected NAND string together with the increase of the voltage of the selected word line. The load when the voltage of the selected word line is decreased may be reduced by discharging the boosted channel voltage of the unselected NAND string when the voltage of the selected word line is decreased. Through such reduction of the load of the selected word line, a voltage setup time may be reduced and an operation speed of the memory device may be enhanced.