NAND Read Threshold Estimation for Inter-Cell Interference Compensation

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Solution Overview

Problem

The increasing parasitic capacitance coupling between neighboring cells in non-volatile memory storage devices due to smaller cell sizes leads to inter-cell interference (ICI), causing errors in endurance and read performance, especially under various stress conditions.

Innovation Solution

A method for dynamically estimating interference compensation thresholds by performing mock reads, computing histograms, and estimating read thresholds based on interference states to mitigate adjacent cell interference, using soft sampling and machine learning techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If non-volatile memory cell sizes are scaled down to increase storage capacity, then storage density is improved, but parasitic capacitance coupling between neighboring cells increases causing inter-cell interference

Engineering Contradiction:

Improvestorage capacityVSAvoidinter-cell interference

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary compensation mechanism that reads interference source rows to determine interference states, then uses this information to dynamically adjust read thresholds for target rows. This intermediary process mediates between the interfering cells and the target cells, allowing the system to maintain high storage density while compensating for the harmful parasitic capacitance coupling effects.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If fast programming methods are used to improve write speed, then programming speed is improved, but interference levels to neighboring rows increase

Engineering Contradiction:

Improveprogramming speedVSAvoidinterference to neighboring rows

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent implements a feedback mechanism where the system performs mock reads on target rows and reads interference source rows to determine actual interference states. Based on this feedback information, the system dynamically adjusts read thresholds to compensate for interference caused by fast programming methods, allowing high programming speeds to be maintained while correcting the resulting read errors.

Inventive Principle:

Principle #23Feedback

3Ease of operation

If fixed read thresholds are used to simplify read operations, then operational complexity is reduced, but read accuracy deteriorates under varying interference conditions

Engineering Contradiction:

Improveread operation simplicityVSAvoidread accuracy

Core Design Contradiction:

Ease of operationVSMeasurement precision

Solution Approach 1:

The patent transitions from static fixed read thresholds to dynamic adaptive thresholds. The system performs mock reads to estimate interference levels and dynamically adjusts read thresholds based on actual interference conditions. This dynamic approach maintains operational simplicity while significantly improving read accuracy under varying interference conditions caused by different programming patterns and retention stresses.

Inventive Principle:

Principle #15Dynamics

4Measurement precision

If mock reads are performed to estimate interference levels, then interference compensation accuracy is improved, but read time increases

Engineering Contradiction:

Improveinterference estimation accuracyVSAvoidread time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by performing mock reads selectively rather than on every row. The system identifies interference source rows and performs mock reads primarily on rows likely to be affected by interference. This partial approach maintains high interference compensation accuracy for critical rows while avoiding the excessive time penalty of universal mock reads across the entire memory array.

Inventive Principle:

Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces bit error rate (BER) and improves endurance and average read performance by accurately compensating for interference, enhancing device efficiency and reliability under different stress conditions.

Implementation Method 1

the scaling down of the memory cell sizes may cause an increase in the parasitic capacitance coupling between neighboring cells (floating gate transistors) in a memory block

Methodology Applied

Scientific EffectParasitic capacitance coupling: Parasitic Capacitance

Implementation Method 2

the scaling down of the memory cell sizes may cause an increase in the parasitic capacitance coupling between neighboring cells (floating gate transistors) in a memory block

Methodology Applied

Scientific EffectParasitic capacitance coupling: Parasitic Capacitance

Data Source

PatentUS12567470B2System and method for dynamic inter-cell interference compensation in non-volatile memory storage devices

Publication Date: 2026.03.03 KIOXIA CORP

AI summary

A method for dynamically estimating interference compensation thresholds of a page of memory includes performing a mock read on a target row using a mock read threshold, performing a read operation on an interference source and reading an interference state of the interference source, computing a histogram and a corresponding threshold based on the mock read threshold and the interference state of the interference source, and estimating a read threshold to dynamically compensate the interference state of the target row based on the histogram.