NAND Read Threshold Compensation for SSD Slow Charge Loss
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The prolonged storage of solid-state drives (SSDs) leads to inefficiencies and resource waste due to slow charge loss (SCL) in NAND flash memory cells, causing high error rates and extensive error correction processes upon power-up, which affects boot-up times and overall performance.
Innovation Solution
A memory controller compensates for SCL by storing values associated with a memory device portion before power-off and computing new values upon power-on to estimate SCL, applying compensation to read threshold voltages, reducing errors and improving read times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If SSD is stored for prolonged periods, then data retention is maintained, but slow charge loss accumulates causing high error rates upon power-up
Solution Approach 1:
The patent performs preliminary actions during the power-off period by having the memory controller store reference values (first values) before powering down. Upon power-on, these pre-stored values are retrieved and compared with newly computed values to estimate SCL effects. This preliminary preparation eliminates the need for extensive error correction during boot-up, directly resolving the contradiction between long-term data retention and read reliability.
Solution Approach 2:
The patent converts the harmful effect of slow charge loss into a beneficial estimation process. By intentionally allowing SCL to occur during storage and then measuring its effects through comparison of threshold voltages, the system transforms an unavoidable degradation mechanism into a quantifiable parameter that can be compensated for. This approach turns the harmful charge loss into useful information about the memory state, improving subsequent read operations.
2Reliability
If extensive error correction processes are performed upon power-up, then data integrity is restored, but boot-up time increases
Solution Approach 1:
The memory controller performs preliminary estimation of SCL effects before normal read operations begin. By computing the difference between stored reference values and currently measured threshold voltages during the power-on sequence, the system prepares compensation parameters in advance. This preliminary action eliminates the need for time-consuming error correction cycles during data retrieval, thus reducing boot-up time while maintaining data integrity.
Solution Approach 2:
The patent implements a feedback mechanism where the memory controller continuously monitors threshold voltage shifts and uses this information to adjust read operations. The computed difference between first values (stored before power-off) and second values (computed after power-on) provides feedback about SCL magnitude, enabling dynamic compensation. This feedback loop ensures data integrity is maintained without requiring extensive error correction, thereby reducing boot-up time.
3Reliability
If SCL compensation is applied to read threshold voltages, then read errors are reduced, but additional processing complexity is introduced
Solution Approach 1:
The patent introduces an intermediary estimation process that mediates between the physical SCL effect and the read operation. Rather than directly combating charge loss through complex error correction codes, the system uses threshold voltage comparison as an intermediary measurement. The difference between first values and second values serves as a proxy for SCL magnitude, enabling simple linear compensation. This intermediary approach reduces read errors without requiring complex processing logic.
Solution Approach 2:
The patent applies parameter changes to the read threshold voltage based on estimated SCL effects. By adjusting the threshold voltage parameter according to the computed difference between stored and measured values, the system compensates for charge loss. This parameter adjustment approach is mathematically simple and can be implemented efficiently in the memory controller, reducing read errors without significantly increasing processing complexity.
Data Source
AI summary
This disclosure is directed to a memory system that compensates for slow charge loss (SCL) encountered during a power off period. The memory system computes, during a power-on sequence of the memory device, a first value associated with reading data from an individual portion of the memory device and obtains a second value associated with reading data from the individual portion, the second value having been computed during a power-off sequence of the memory device. The memory system compares the first value with the second value to estimate a measure of SCL encountered while the memory device was powered off and reads the data from a plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL.