NAND Flash Memory Threshold Voltage Adjustment
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Solution Overview
Problem
NAND flash memory reliability decreases with smaller process geometries, leading to increased error rates, necessitating robust error correction methods like LDPC codes, but existing methods for adjusting read voltage thresholds are inefficient and rely on manual operations or brute force searches.
Innovation Solution
An iterative optimization method is implemented in the NAND flash memory controller to adjust threshold voltages based on probability differences between read and write states, using stochastic gradient descent or lattice adaptive filters, to minimize Raw Bit Error Rate (RBER) and extend SSD life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manual operations or brute force searches are used to adjust read voltage thresholds, then the adjustment can be performed, but the process is inefficient and time-consuming
Solution Approach 1:
The patent implements an iterative optimization method where the controller adjusts read voltage thresholds based on feedback from error rates. The system monitors read errors, calculates probability differences between read and write states, and uses this feedback to automatically adjust thresholds in subsequent iterations, eliminating manual intervention and brute force searching.
Solution Approach 2:
The system performs self-optimization by automatically adjusting its own read voltage thresholds based on observed error patterns. The controller independently calculates probability differences and modifies thresholds without external manual operations, enabling the system to service itself and improve performance autonomously.
2Reliability
If robust error correction methods like LDPC codes are implemented, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent changes the operational parameters of the memory system by dynamically adjusting read voltage thresholds based on error probability analysis. This parameter optimization reduces the number of correctable errors needed, allowing simpler error correction schemes to achieve the same reliability, thereby reducing device complexity while maintaining robust error correction.
3Ease of manufacture
If smaller process geometries are used to reduce cost, then manufacturing cost decreases, but reliability and error rate worsen
Solution Approach 1:
The patent replaces physical manufacturing improvements with a software-based optimization approach. Instead of relying on better manufacturing processes to reduce errors, the system uses iterative probability-based threshold adjustment to compensate for manufacturing variations, allowing smaller geometries to achieve acceptable reliability without increasing manufacturing complexity.
4Reliability
If iterative optimization method is implemented to optimize read voltage thresholds, then reliability is improved, but computational requirements increase
Solution Approach 1:
The patent applies partial optimization by focusing computational effort only on adjusting read voltage thresholds based on specific probability differences, rather than optimizing all memory parameters. This targeted approach achieves reliability improvement with moderate computational overhead, avoiding excessive energy consumption while still capturing the most significant error reduction opportunities.
Data Source
AI summary
A method is disclosed for setting or modifying a threshold voltage in a NAND flash memory, using an optimization method and based on an error, such as stored in a threshold voltage table. In an embodiment, a method is provided to optimize the read voltage on a NAND flash memory in order to minimize the errors on the NAND flash memory in the fewest reads operations as possible. Advantageously, the method of the present disclosure is more reliability as the method minimizes a Raw Bit Error Rate (RBER) on the NAND flash memory. In an embodiment, a NAND controller adjusts an existing cell read threshold voltage for a selected cell, using an iterative optimization method, based on a difference between first and second error rates, or a difference between first and second probabilities, to generate an adjusted cell read threshold voltage.