NAND Memory Valley Voltage Prediction for Stable Read Accuracy
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Solution Overview
Problem
The accuracy of reading data stored in NAND memory cells is affected by the variation of stored charges over time and repeated read operations, as well as temperature fluctuations, leading to inaccuracies in data retrieval.
Innovation Solution
A memory device and system that utilize a peripheral circuit to determine a predicted valley voltage using a function model, such as a quadratic function, to improve read accuracy by adjusting read voltages based on previous read results and voltage differences, enabling precise data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If read operations are performed on NAND memory cells, then data can be retrieved, but the stored charges vary over time and repeated reads, causing read accuracy to deteriorate
Solution Approach 1:
The patent applies preliminary action by performing multiple read operations at different voltages before the actual data retrieval to predict the valley voltage. The peripheral circuit reads the memory cell at M different target read voltages, obtains first results, and predicts the valley voltage in advance using a function model. This preliminary prediction ensures that when the actual read operation occurs, the optimal read voltage is already determined, compensating for charge variations that occur over time and repeated reads.
Solution Approach 2:
The patent implements feedback by using the read results to continuously optimize the read voltage. The peripheral circuit obtains first results from reading at different voltages, feeds these results into a function model to predict the valley voltage, and then uses this predicted voltage for subsequent reads. This closed-loop feedback mechanism adapts to charge variations caused by time and repeated operations, maintaining high read accuracy despite deteriorating charge stability.
2Measurement precision
If multiple read voltages are used to improve accuracy, then read precision increases, but the complexity of the read operation increases
Solution Approach 1:
The patent applies parameter changes by systematically varying the read voltage parameter across M different target voltages. The peripheral circuit reads the memory cell at each of these voltages, obtains first results, and uses a function model to predict the optimal valley voltage. This structured parameter variation approach improves read accuracy by capturing the voltage-accuracy relationship, while the automated function model processing keeps the operational complexity manageable.
3Measurement precision
If the read voltage is adjusted based on predicted valley voltage, then data retrieval accuracy improves, but the time required for voltage determination increases
Solution Approach 1:
The patent performs the voltage determination action in advance by conducting multiple reads at different voltages and predicting the valley voltage before the actual data retrieval operation. The peripheral circuit obtains M first results at M target read voltages, uses the function model to predict the valley voltage, and stores this predicted voltage for use in subsequent read operations. This preliminary determination eliminates the need for time-consuming voltage adjustments during actual data retrieval, thus reducing operational time loss.
4Measurement precision
If a function model is used to predict valley voltage, then read accuracy improves, but the computational complexity of the peripheral circuit increases
Solution Approach 1:
The patent replaces complex hardware-based voltage adjustment mechanisms with a software/mathematical function model approach. Instead of using complex circuitry to directly determine the optimal read voltage, the peripheral circuit uses a function model that processes the M first results computationally to predict the valley voltage. This substitution of mathematical modeling for hardware complexity achieves high prediction accuracy while keeping the peripheral circuit design more manageable and flexible.
Data Source
AI summary
According to one aspect of the present disclosure, a memory device is provided. The memory device may include a memory cell array including a plurality of memory cells. A preset number of the memory cells may form a code word. The memory device may include a peripheral circuit coupled with the memory cell array. The peripheral circuit may be configured to obtain M first results corresponding to at least one code word at M target read voltages. The peripheral circuit may be configured to obtain a predicted valley voltage according to the M first results and the M target read voltages in conjunction with a preset function model. The peripheral circuit may be configured to determine a target valley voltage based on the predicted valley voltage. The target valley voltage may be configured as a read voltage for a read operation on the at least one code word.