NAND Memory Valley Voltage Selection for Charge Retention Drift
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Solution Overview
Problem
The accuracy of data reading in NAND memory devices is affected by charge retention issues due to increased use time and temperature variations, leading to high read errors that exceed the capability of existing Error Correction Codes (ECC).
Innovation Solution
A method is introduced to adjust the read voltage based on the number of flipped bits at different voltages, determining a 'valley voltage' for accurate reading by analyzing multiple read results, followed by ECC decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional fixed read voltage is used, then device complexity is low, but measurement precision deteriorates due to charge retention issues affecting read accuracy
Solution Approach 1:
The patent implements dynamic read voltage adjustment by introducing a read voltage adjustment module that modifies the read voltage based on detected error patterns. The system transitions from fixed voltage to variable voltage readings, where the read voltage is dynamically adapted according to the number of flipped bits detected in previous read operations, thereby improving read accuracy under varying charge retention conditions
Solution Approach 2:
The system employs feedback mechanisms where read results are analyzed to determine the number of flipped bits, which then feeds back to adjust subsequent read voltages. This closed-loop approach uses read error information to continuously optimize read voltage selection, improving measurement precision while managing complexity through intelligent control algorithms
2Measurement precision
If multiple read operations at different voltages are performed to improve accuracy, then measurement precision improves, but loss of time increases due to additional read operations
Solution Approach 1:
The patent applies partial action by performing read operations only when necessary - specifically when flipped bits are detected. The system reads at multiple voltages conditionally based on error detection, rather than always performing multiple reads. This selective approach maintains high accuracy when needed while minimizing time loss during normal operation
Solution Approach 2:
The system skips unnecessary multiple read operations by using a decision-making mechanism that determines whether additional reads are needed. When the initial read shows no flipped bits, the system rushes through to complete the read operation quickly without performing additional voltage-based reads, thereby reducing time loss while maintaining accuracy
3Measurement precision
If read voltage is adjusted based on flipped bits, then measurement precision improves, but device complexity increases due to additional control logic
Solution Approach 1:
The patent introduces an intermediary read voltage adjustment module that sits between the read operation and the data output. This intermediary component handles the complexity of voltage adjustment and error analysis, isolating the core memory array from complex control logic while improving read accuracy through intelligent voltage selection based on flipped bit detection
Data Source
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Figure 2b~3a
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AI summary
Examples of the present application disclose a memory device and operating method thereof, a memory system and operating method thereof, wherein the memory device includes: an array of memory cells, including a plurality of memory cells, and a preset number of memory cells forming one code word; a peripheral circuit coupled to the array of memory cells and configured to: obtain the first result corresponding to the code word at the current read voltage, the first result represents the number of bits in the code words which are flipped in two results of reading at a corresponding read voltage and a voltage near the corresponding read voltage; perform multiple adjustments on the current read voltage in accordance with the first result corresponding to the code words at the current read voltage; obtain the first result corresponding to the code words at the adjusted read voltage; determine a valley voltage in accordance with a plurality of the first results; the valley voltage is to be a read voltage for performing a read operation on the code words.