Nano-Composite Redistribution Layer Warpage Reduction

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Solution Overview

Problem

Wafer-level packaging redistribution layers experience warpage due to coefficient of thermal expansion (CTE) mismatch between dielectric materials and silicon, leading to handling difficulties and lithography defocus issues.

Innovation Solution

Incorporating a nano-composite material with a dielectric material and nano-filler, such as polybenzoxazole (PBO) and clay, to reduce the CTE of redistribution layers, matching it closer to that of silicon, thereby minimizing warpage and maintaining a planar structure for improved handling and lithography processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional dielectric materials are used in redistribution layers, then the packaging process is simple, but warpage occurs due to CTE mismatch between dielectric materials and silicon

Engineering Contradiction:
Improvewarpage reductionVSAvoidmaterial composition complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a composite dielectric material comprising polybenzoxazole (PBO) as the base material and clay nanoparticles as filler. This composite structure combines the low CTE of clay with the mechanical properties of PBO, achieving a balanced CTE match with silicon substrate while maintaining structural integrity and reducing warpage in redistribution layers.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent modifies the CTE parameter of the dielectric material by incorporating clay filler at optimized concentrations (typically 5-20 wt%). This parameter adjustment brings the CTE of the dielectric layer closer to that of the silicon substrate, reducing thermal expansion mismatch and preventing warpage during temperature cycling and lithography processes.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If nano-composite materials are used to reduce CTE mismatch, then warpage is reduced, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvelithography focus precisionVSAvoidmaterial deposition complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent incorporates clay filler into the dielectric material formulation before deposition. This preliminary preparation ensures that the material inherently possesses the desired CTE properties, eliminating the need for post-deposition warpage correction and simplifying the overall manufacturing process while maintaining lithography precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies the nano-composite dielectric material specifically in regions where warpage control is critical, such as under contact pads and in interconnect regions. This localized application of advanced material technology optimizes lithography focus precision in critical areas without unnecessarily complicating the entire manufacturing process.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of nano-composite materials in redistribution layers reduces warpage, allowing for easier handling and preventing lithography defocus, ensuring the package remains planar and functional during processing.

Implementation Method 1

Incorporating a nano-composite material with a dielectric material and nano-filler, such as polybenzoxazole (PBO) and clay, to reduce the CTE of redistribution layers, matching it closer to that of silicon

Methodology Applied
Scientific EffectComposite materials: Composite Materials

Implementation Method 2

coefficient of thermal expansion (CTE) mismatch between dielectric materials and silicon

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS10490521B2Advanced structure for info wafer warpage reduction
Publication Date: 2019.11.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10490521B2 patent drawing
  • US10490521B2 patent drawing
  • US10490521B2 patent drawing

AI summary

A package (e.g., a wafer level package (WLP)) including one or more redistribution layers to fan out the contact pads of the one or more dies within an integrated circuit structure. An example package includes a die having a contact pad exposed at a frontside thereof. The package also includes a redistribution layer disposed over the frontside of the die. The redistribution layer includes metallization extending through a nano-composite material, which may be formed from a dielectric material with a nano-filler material disposed therein. The metallization is electrically coupled to the contact pad of the die. By incorporating the nano-composite material in the redistribution layer, the coefficient of thermal expansion (CTE) of the redistribution layer more closely matches the CTE of the die, which prevents or eliminates undesirable warpage of the redistribution layers.