Nano-FET Gate Stack Fluorination for Threshold Voltage Tuning
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, challenges arise in integrating electronic components efficiently while maintaining device performance, particularly in nano-FETs, due to issues with gate dielectric materials and work function metals.
Innovation Solution
Implementing a fluorine-treated work function metal layer in the gate stack, which diffuses fluorine into the underlying high-k gate dielectric, thereby adjusting the flatband voltage and threshold voltage for improved transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional gate dielectric materials are used in nano-FETs, then device integration density can be improved through size reduction, but device performance deteriorates due to threshold voltage control issues
Solution Approach 1:
The patent applies parameter changes by introducing fluorine treatment to modify the work function of the gate electrode material. This chemical treatment alters the electrical properties of the gate stack, enabling precise control of threshold voltage while maintaining the scaled dimensions required for high integration density. The fluorine treatment changes the flatband voltage and work function parameters without requiring changes to the physical structure or size of the device.
2Productivity
If feature sizes are reduced to increase integration density, then more components can be integrated, but manufacturing precision and device performance become difficult to maintain
Solution Approach 1:
The fluorine treatment process enables parameter adjustment of the gate electrode's work function without requiring changes to the physical dimensions or geometric precision of the scaled features. This allows standard manufacturing processes to maintain their precision capabilities while achieving the desired electrical performance through chemical modification rather than dimensional control.
Solution Approach 2:
The patent replaces mechanical/dimensional control methods with chemical treatment methods. Instead of relying on precise physical dimensions and geometric alignment that become increasingly difficult at smaller scales, the invention uses fluorine chemical treatment to achieve the desired electrical characteristics, substituting a chemical process for mechanical precision requirements.
3Ease of manufacture
If standard work function metals are used, then gate electrode fabrication is simplified, but flatband voltage and threshold voltage control are insufficient for advanced nodes
Solution Approach 1:
The patent creates a composite structure by combining a standard work function metal with fluorine treatment. This composite approach maintains the fabrication simplicity of conventional metals while adding the electrical control capabilities of fluorinated surfaces. The fluorine-treated metal layer combines the manufacturing advantages of standard metals with the electrical properties needed for advanced node devices.
Solution Approach 2:
The fluorine treatment modifies the work function parameter of the gate electrode material in situ, allowing the same material to serve dual purposes: maintaining ease of fabrication like standard metals while achieving the voltage control characteristics of specialized materials. This parameter modification occurs through chemical treatment rather than material substitution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The fluorine treatment enhances device performance by increasing flatband voltage towards the band edge of the work function metal layer, decreasing threshold voltage, and improving overall transistor operation.
Implementation Method 1
a fluorine-treated work function metal layer in the gate stack, which diffuses fluorine into the underlying high-k gate dielectric
Data Source
AI summary
A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric around the first nanostructure; a second high-k gate dielectric around the second nanostructure; and a gate electrode over the first and second high-k gate dielectrics. The gate electrode includes a first work function metal; a second work function metal over the first work function metal; and a first metal residue at an interface between the first work function metal and the second work function metal, wherein the first metal residue has a metal element that is different than a metal element of the first work function metal.