Nano-patterned Substrate for Photovoltaic Cell Efficiency
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Solution Overview
Problem
The high cost and low efficiency of photovoltaic power generation systems, particularly thin film photovoltaic cells like Cadmium Telluride (CdTe), hinder their widespread adoption due to balance-of-system issues and low module efficiencies, leading to implementation costs that are 2-4 times higher than the cost of power from existing electric grids.
Innovation Solution
A photovoltaic cell design featuring a nano-patterned substrate layer with nano-windows, where a p-type semiconductor material accumulates in these windows, forming pseudomorphic crystal growth and reducing crystal defects, enhancing efficiency by creating multiple heterojunctions and promoting current collection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional thin film photovoltaic cells (e.g., CdTe) are used, then manufacturing cost can be reduced to $1/Watt or below, but module efficiency remains low at approximately 12%, causing balance-of-system issues and implementation costs 2-4 times higher than grid power
Solution Approach 1:
The substrate is divided into a nano-patterned layer with multiple nano-windows (e.g., 50-500 nm in size) arranged in an array. This segmentation creates numerous individual reaction sites for pseudomorphic growth, allowing the p-type semiconductor material to form multiple small crystal domains rather than one large crystal, thereby reducing defect formation while maintaining manufacturing feasibility
Solution Approach 2:
The nano-patterned substrate creates localized regions with different properties: the nano-windows provide confined spaces for controlled pseudomorphic growth, while the regions between windows allow for selective material accumulation. This local differentiation enables precise control over crystal growth morphology and defect distribution, improving efficiency without sacrificing manufacturability
2Ease of manufacture
If CdTe cells are manufactured at or below $1/Watt, then cost barrier is met, but persistently low photovoltaic module efficiencies of ~12% create balance-of-system issues that raise implementation cost to 2-4 times the cost of power from existing electric grids
Solution Approach 1:
The invention changes the physical parameters of the substrate by introducing a nano-patterned structure with specific dimensional characteristics (nano-windows 50-500 nm in size). This parameter change fundamentally alters the growth mode of the semiconductor material from conventional planar growth to pseudomorphic growth in confined spaces, thereby improving efficiency and reliability while maintaining cost effectiveness
3Reliability
If CdTe cells have high theoretical efficiency with direct band gap of 1.5 eV and theoretical maximum single junction conversion efficiency of ~30%, then ideal performance is achieved, but practical performance has remained stagnant at ~16% for several years
Solution Approach 1:
The nano-patterned substrate acts as an intermediary between the n-type and p-type semiconductor layers, mediating the crystal growth process. By providing a structured template with nano-windows, it enables pseudomorphic growth that reduces defects and improves charge carrier transport, thereby bridging the gap between theoretical and practical efficiency
Solution Approach 2:
The invention transitions from conventional two-dimensional planar growth to three-dimensional pseudomorphic growth within nano-scale windows. This dimensional change allows for better control of crystal orientation and reduced defect density, enabling practical efficiency to approach theoretical maximum by utilizing the vertical dimension for improved charge separation and transport
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The nano-patterned substrate layer design improves photovoltaic cell efficiency by reducing defects and increasing voltage and current output, potentially achieving cost parity with conventional power generation systems.
Implementation Method 1
The p-type semiconductor material accumulates in the nano-windows of the nano-patterned substrate layer, causing a respective p-n junction to form in each nano-window by way of pseudomorphic crystal growth
Implementation Method 2
The adoption of photovoltaics for generating electricity from sunlight
Data Source
AI summary
A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer. The nano-patterned substrate layer is positioned between an n-type semiconductor layer composed of an n-type semiconductor material and a p-type semiconductor layer composed of a p-type semiconductor material. Semiconductor material accumulates in the plurality of nano-windows, causing a plurality of heterojunctions to form between the n-type semiconductor layer and the p-type semiconductor layer.