Nano TSV Structure With Self-Alignment for Shrinking Semiconductor Stacks
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Solution Overview
Problem
Through substrate vias in semiconductor devices are becoming a limiting factor as semiconductor assemblies continue to shrink in size, posing challenges in electrical coupling and alignment during the manufacturing process.
Innovation Solution
The method involves forming nano through substrate vias (TSVs) with sloping sidewalls that facilitate easier alignment and etching, using dielectric materials to protect the semiconductor substrate during etching, and forming conductive TSVs with frustoconical shapes to ensure precise placement without substrate thinning, thereby reducing the risk of defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional through substrate vias are used, then electrical coupling between stacked semiconductor components is achieved, but alignment difficulty and manufacturing complexity increase as device size decreases
Solution Approach 1:
The patent applies preliminary action by forming sacrificial pillars and trenches before creating the final via holes. The sacrificial pillars are positioned and patterned in advance, providing alignment references for subsequent via formation. This pre-positioning ensures that the via holes are accurately aligned with the underlying and overlying conductive layers, solving the alignment precision problem in miniaturized devices.
Solution Approach 2:
The patent uses sacrificial pillars as intermediary structures during the via formation process. These temporary structures serve as placeholders and alignment guides that are removed after the via holes are formed. The intermediary pillars enable precise via placement without requiring direct alignment between opposing surfaces, thereby improving manufacturing precision while maintaining reliable electrical coupling.
2Ease of manufacture
If substrate thinning is performed to form via holes, then via formation is enabled, but substrate cracking and device reliability decrease
Solution Approach 1:
The patent extracts the substrate thinning step from the via formation process. Instead of thinning the substrate to create via access, the method forms via holes through the full substrate thickness using direct patterning and etching on the intact substrate surface. This extraction eliminates the substrate cracking risk while maintaining ease of via formation, as the substrate remains mechanically robust throughout the process.
Solution Approach 2:
The patent applies self-service by using the substrate's own surface features and previously formed structures to guide via formation without requiring substrate thinning. The sacrificial pillars and trenches provide self-aligned references that enable via holes to be formed directly through the intact substrate, allowing the substrate to serve itself as the formation medium without compromising its structural integrity.
3Reliability
If vertical via holes are formed, then electrical coupling is achieved, but alignment difficulty increases due to lack of self-alignment
Solution Approach 1:
The patent uses preliminary action by forming sacrificial pillars and trenches that create self-aligned references before via hole formation. These pre-formed structures automatically position the via holes with respect to the substrate and other layers, eliminating the need for complex alignment procedures. The preliminary structures ensure that via holes are vertically aligned and properly positioned, reducing alignment complexity while maintaining reliable electrical coupling.
4Productivity
If conventional via formation methods are used, then through-substrate connectivity is achieved, but manufacturing precision deteriorates in miniaturized devices
Solution Approach 1:
The patent applies segmentation by dividing the via formation process into distinct stages: forming sacrificial pillars, creating trenches, removing pillars, and forming via holes. This segmentation allows each step to be optimized independently, with the sacrificial pillars providing precise positioning references that improve via placement precision. The segmented approach maintains productivity by enabling batch processing while achieving high precision in miniaturized devices.
Data Source
AI summary
Semiconductor devices having nano through substrate vias (TSVs), and related systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a semiconductor substrate that has a first surface and a second surface opposite the first surface. A trench is formed in the first surface and filled with a dielectric material and a TSV extends from the first surface to the second surface within the footprint of the trench. In some embodiments, the TSV includes a conductive material that includes a first portion and a second portion. The first portion includes a first end at the first surface and a second end with a larger cross-sectional area than the first end. Similarly, the second portion includes a third end coupled to the second end and a fourth end at the second surface with a larger cross-sectional area than the third end.