Nanoconductor Thin Film Transistor for OLED Power Efficiency
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Solution Overview
Problem
Current thin film transistors (TFTs) used in OLED displays face challenges due to low mobility of channel materials, such as amorphous silicon, which requires high source-drain voltage to drive current, leading to power consumption issues and compromising power savings.
Innovation Solution
A thin film transistor design with a channel region comprising a semiconductor layer and a nanoconductor layer of aligned nanotubes or nanowires, where the nanoconductor layer is situated between the semiconductor layer and the dielectric layer, enhancing charge transfer characteristics during high field effect operation while maintaining good leakage current performance during low field effect operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon or organic semiconductor materials are used as channel materials, then the TFT can be fabricated with low cost and homogeneity, but the mobility is low (0.1 cm2/V s) requiring large source-drain voltage which increases power consumption
Solution Approach 1:
The patent combines amorphous silicon (or organic semiconductor) with carbon nanotubes to form a composite channel structure. The amorphous silicon provides ease of fabrication and homogeneity, while the carbon nanotubes contribute high mobility, enabling the device to achieve both low-cost manufacturing and reduced power consumption through the synergistic properties of the composite material.
2Ease of manufacture
If p-type amorphous silicon is used as channel material, then the TFT can be fabricated with low cost, but the mobility is extremely low (0.01 cm2/V s) requiring even larger source-drain voltage and higher power consumption
Solution Approach 1:
The patent creates a composite channel structure combining p-type amorphous silicon with carbon nanotubes. The amorphous silicon maintains the low-cost fabrication advantage, while the carbon nanotubes provide high mobility to overcome the extremely low mobility of p-type amorphous silicon, thereby reducing the required source-drain voltage and power consumption.
3Productivity
If high source-drain voltage is applied to drive current through low-mobility channel materials, then the necessary current can be supplied, but power is consumed in the transistor rather than in light production, compromising power savings
Solution Approach 1:
The composite channel structure combines amorphous silicon with carbon nanotubes, where the carbon nanotubes provide high mobility pathways that enable sufficient current supply at lower source-drain voltages. This reduces the power consumed in the transistor, allowing more power to be directed toward light production in the OLED, thereby preserving power savings.
4Device complexity
If a single-layer semiconductor channel is used, then the structure is simple, but the mobility is insufficient to drive current efficiently without high voltage
Solution Approach 1:
The patent implements a composite channel structure with amorphous silicon and carbon nanotubes. This multi-layer composite maintains relative structural simplicity while the carbon nanotube component provides high mobility pathways, enabling efficient charge carrier transport without requiring high voltage operation.
Solution Approach 2:
The patent introduces carbon nanotubes as a one-dimensional conductive element within the two-dimensional amorphous silicon channel layer. This dimensional integration creates vertical charge transport pathways through the nanotubes, supplementing the lateral transport in the amorphous silicon and enhancing overall mobility without significantly increasing structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The TFT design improves effective mobility and reduces power consumption by supplementing charge carrier conduction through nanoconductors, enabling efficient current delivery with enhanced performance and reduced leakage current.
Implementation Method 1
the charge transfer characteristics of the channel region is enhanced by charges being conducted through the nanoconductors
Implementation Method 2
During high field effect operation (e.g., high gate-source voltages), the charge transfer characteristics of the channel region is enhanced
Data Source
AI summary
A thin film transistor having a channel region including a nanoconductor layer. The nanoconductor layer can be a dispersed monolayer of nanotubes or nanowires formed of carbon. The thin film transistor generally includes a gate terminal insulated by a dielectric layer. The nanoconductor layer is placed on the dielectric layer and a layer of semiconductor material is developed over the nanoconductor layer to form the channel region of the thin film transistor. A drain terminal and a source terminal are then formed on the semiconductor layer. At low field effect levels, the operation of the thin film transistor is dominated by the semiconductor layer, which provides good leakage current performance. At high field effect levels, the charge transfer characteristics of the channel region are enhanced by the nanoconductor layer such that the effective mobility of the thin film transistor is enhanced.