Nanocrystal Depletion-Layer Memory With MST Interface Mobility Gain
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices face limitations in achieving enhanced performance due to challenges in improving charge carrier mobility and reducing scattering effects at semiconductor-insulator interfaces.
Innovation Solution
The introduction of an enhanced semiconductor superlattice, referred to as MST technology, which includes a superlattice structure with non-semiconductor monolayers constrained within a crystal lattice of adjacent semiconductor portions, effectively reducing charged impurity concentration and improving interface quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional semiconductor structures are used, then manufacturing is simpler, but charge carrier mobility is limited due to scattering effects at interfaces
Solution Approach 1:
The semiconductor structure is segmented into multiple alternating layers of semiconductor material and non-semiconductor monolayers, forming a superlattice structure. This segmentation creates distinct regions that reduce scattering effects at interfaces while maintaining overall structural integrity, thereby improving charge carrier mobility without excessive complexity
Solution Approach 2:
Non-semiconductor monolayers are strategically placed at specific interfaces within the semiconductor structure to locally improve interface quality. These monolayers are constrained within the crystal lattice of adjacent semiconductor portions, providing localized enhancement of charge carrier transport properties where needed most
2Object-affected harmful factors
If interface quality is improved by adding non-semiconductor monolayers, then scattering effects are reduced, but manufacturing precision requirements increase
Solution Approach 1:
Non-semiconductor monolayers are nested within the crystal lattice structure of adjacent semiconductor portions. This nesting approach allows the monolayers to be constrained in place without requiring extreme precision, as they are accommodated within the existing lattice structure rather than requiring perfect alignment from external fabrication processes
Solution Approach 2:
Non-semiconductor monolayers act as intermediary layers between semiconductor regions, mediating the interface properties. These intermediary monolayers reduce scattering effects by providing a transition zone that smooths out interface discontinuities, thereby reducing harmful scattering without demanding ultra-high manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MST technology enhances charge carrier mobility by reducing scattering effects and improving the quality of semiconductor-insulator interfaces, leading to improved performance in semiconductor devices.
Implementation Method 1
reducing scattering effects at semiconductor-insulator interfaces
Implementation Method 2
a plurality of nanocrystals within the depletion region, with each nanocrystal comprising a semiconductor material and carbon
Data Source
AI summary
A method for making a memory device may include forming an array of memory cells on a semiconductor substrate. Each memory cell may include a first well in the semiconductor substrate having a first conductivity type, a second well adjacent the first well and having a second conductivity type and defining a depletion layer with the first well, and nanocrystals within the depletion region, with each nanocrystal comprising a semiconductor material and carbon. The memory device may further include spaced apart source and drain regions adjacent the second well and defining a channel therebetween, and a gate overlying the channel.