Nano-FET Source/Drain Seeding Layer for Uniform Epitaxy
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Solution Overview
Problem
As semiconductor devices continue to integrate more components into a given area with reduced minimum feature sizes, issues such as voids and stacking faults in epitaxial source/drain regions arise, affecting the uniformity and performance of nano-FETs.
Innovation Solution
A continuous seeding layer is formed over the sidewalls of nanostructures and gate inner spacers, providing abundant and evenly distributed nucleation sites for the growth of epitaxial source/drain regions, which enhances the uniformity and reduces defects like voids and stacking faults.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but voids and stacking faults occur in epitaxial source/drain regions
Solution Approach 1:
A seeding layer is formed in advance over the substrate and inner spacer surfaces before the epitaxial growth of source/drain regions. This preliminary action provides pre-prepared nucleation sites that guide the subsequent epitaxial growth, ensuring uniform deposition even at reduced feature sizes and preventing defects such as voids and stacking faults.
2Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but defects like voids and stacking faults increase
Solution Approach 1:
The seeding layer is deposited beforehand to establish controlled nucleation sites, which guides the epitaxial growth process and prevents the formation of voids and stacking faults that would compromise device reliability at scaled dimensions.
Solution Approach 2:
The seeding layer acts as an intermediary between the substrate/inner spacer surfaces and the epitaxial source/drain regions. It mediates the growth process by providing a uniform template that ensures defect-free epitaxial growth, thereby maintaining device reliability despite reduced feature sizes.
3Ease of manufacture
If epitaxial source/drain regions are grown without a seeding layer, then the process is simpler, but the uniformity and defect-free quality of the regions deteriorate
Solution Approach 1:
While adding a seeding layer step, the process gains controlled nucleation that dramatically improves uniformity. The seeding layer is deposited as a thin, conformal layer that prepares the surface for epitaxial growth, ensuring that the subsequent source/drain region formation is uniform and defect-free, outweighing the additional process step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the overall performance of nano-FETs by increasing the uniformity and reducing defects in the epitaxial source/drain regions, leading to better device reliability and functionality.
Implementation Method 1
providing abundant and evenly distributed nucleation sites for the growth of epitaxial source/drain regions
Implementation Method 2
the growth of epitaxial source/drain regions
Data Source
AI summary
A semiconductor device including a seeding layer in the source/drain region and a method of forming is provided. The semiconductor device may include a plurality of nanostructures over a substrate, a gate structure wrapping around the plurality of nanostructures, a source/drain region adjacent the plurality of nanostructures, and inner spacers between the source/drain region and the gate structure. The source/drain region may include a polycrystalline seeding layer covering sidewalls of the plurality of nanostructures and sidewalls of the inner spacers, and a semiconductor layer over the seeding layer. The semiconductor layer may have a higher dopant concentration than the seeding layer.